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51 Commits

Author SHA1 Message Date
419b86999d Make use of C++ standard library 2022-05-29 16:15:11 +02:00
a5f8e8e3d7 Fix volatile compound assignments being deprecated in C++20 2022-05-29 14:46:32 +02:00
119de32445 Adapt to moved type submodule 2020-05-16 17:42:52 +02:00
8f88cdccea Fix misaligned ifdef-endif pair 2020-04-13 17:17:17 +02:00
dfb076cda8 Change interrupt handler technique to not rely on function pointer and instead use user-facing macros 2020-04-13 16:43:04 +02:00
6d9ef6e4be Make variables const 2020-04-13 16:41:16 +02:00
bcd18db494 Fix double speed flag not being cleared if not used 2020-04-13 13:06:11 +02:00
04b6782ec4 Add automatic selection of double speed based on error 2020-04-12 23:57:16 +02:00
ae03c8d43e Adapt to new std compliant naming of numeric_limits 2020-04-07 19:15:05 +02:00
41b9ef74f9 Moved uart utils to separate type submodule 2020-04-07 03:50:29 +02:00
6f592dd098 Fixed missing const qualifier 2020-04-06 21:45:20 +02:00
fa0a65a94c Capitalized local constexpr variables to be more consistent 2020-04-05 03:36:05 +02:00
0e128bcb7d Made variable const 2020-04-05 03:30:22 +02:00
0a52110d47 Moved buffer closer to where needed 2020-04-05 03:28:45 +02:00
f751833a88 Made variables constexpr 2020-04-05 03:25:25 +02:00
1bd49f65fa Fixed template variable capitalization 2020-04-05 03:23:12 +02:00
cb436b11a8 Changed static assert to indicate impossible usage 2020-02-21 17:46:28 +01:00
2a2b9b8817 Added MIT license file 2020-02-01 15:36:20 +01:00
0532bf48b0 Changed library so that user has to explicitly include hardware header with int vector define set to get ISR 2019-08-15 18:58:25 +02:00
f6df6a6a18 Undid accidental regression 2019-08-15 18:49:29 +02:00
1bdc06a325 Switched to include interrupt vectors by default 2019-08-15 18:12:37 +02:00
ddf105a175 Made library header only again and provided way to disable interrupt vectors 2019-08-15 18:07:11 +02:00
2fd05483ee Replaced workaround with provided macro 2019-08-15 17:48:41 +02:00
16c9015f43 Replaced maybe_unused with unnamed parameter 2019-08-14 19:55:06 +02:00
7c21664fe4 Refactored code to get rid of code duplication 2019-08-14 19:49:42 +02:00
e326e40b38 Fixed blocking on full rx buffer and implemented support for ATmega328P 2019-08-14 18:58:21 +02:00
8d028aa635 Changed git ignore to ignore make output 2019-08-11 10:04:15 +02:00
c4700ed824 Fixed non-compliant use of constexpr for pointers 2019-08-10 14:12:10 +02:00
1ee9bc8ca4 Removed sign from maxNumDigits, because sign is handled separately anyway 2019-08-07 19:59:48 +02:00
1c026e8eb3 Updated git ignore file 2019-08-05 21:18:36 +02:00
c4f38cbcdf Changed template parameter order 2019-08-05 20:05:59 +02:00
87e6936051 Added enabling of interrupts for interrupt driven uart 2019-08-05 17:59:33 +02:00
1d633c538e Implemented numeric limits for floating point 2019-08-05 17:56:10 +02:00
231fc0de48 Changed clock header to cpp file extension 2019-08-03 20:20:20 +02:00
6438aa81c1 Added padding and case selection to txNumber 2019-08-03 19:49:01 +02:00
8153696309 Fixed flushing not blocking correctly 2019-08-03 18:45:51 +02:00
9f9f7a8de5 Added flushing of transmit buffer 2019-08-03 17:52:28 +02:00
b6c1c3b51b Fixed conversion for bases other than 10 2019-08-03 17:32:38 +02:00
8d07e2d4db Implemented overloads for printing numbers 2019-08-03 16:52:57 +02:00
fe9e67036e Implemented stream operator for some basic types 2019-08-03 16:17:07 +02:00
9f7dc0da55 Added alias for driver dependent data size 2019-08-03 16:13:52 +02:00
2a07744575 Added static_assert for transmitting numbers 2019-08-03 16:11:21 +02:00
ecdefe40e7 Implemented integral type checking 2019-08-03 16:10:19 +02:00
53b791cb05 Implemented printing of numbers 2019-08-03 15:00:41 +02:00
50e01c480d Implemented templated numeric limits 2019-08-03 14:54:23 +02:00
7d4eddbd8b Changed interface to not initialize uart on construction 2019-08-03 11:14:01 +02:00
778f5f9754 Moved always_false template to utils 2019-08-03 10:58:32 +02:00
1ca8ea2061 Removed Peter Fleury's c uart library 2019-08-03 10:47:32 +02:00
80633998c7 Removed legacy usart library 2019-08-03 10:23:53 +02:00
2cd4069654 Moved interrupt vectors to their own translation unit to solve redefinition error 2019-08-02 20:29:04 +02:00
33c3cedb1e Fixed missing headers 2019-08-02 20:23:54 +02:00
12 changed files with 677 additions and 2242 deletions

8
.gitignore vendored
View File

@@ -2,4 +2,10 @@
Release
Debug
*.componentinfo.xml
avrdude.bat
*.elf
*.o
*.hex
*.srec
*.eeprom
*.lss
*.map

21
LICENSE Normal file
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@@ -0,0 +1,21 @@
MIT License
Copyright (c) 2019 BlackMark
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is furnished
to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS
OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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@@ -1,5 +1,7 @@
#pragma once
#include <cstdint>
namespace uart {
enum class DataBits {
@@ -25,17 +27,17 @@ namespace detail {
template <DataBits dataBits>
struct choose_data_type {
using type = uint8_t;
using type = std::uint8_t;
};
template <>
struct choose_data_type<DataBits::NINE> {
using type = uint16_t;
using type = std::uint16_t;
};
} // namespace detail
template <uint32_t baudRate = 9600, DataBits dataBits = DataBits::EIGHT, Parity parity = Parity::NONE,
template <std::uint32_t baudRate = 9600, DataBits dataBits = DataBits::EIGHT, Parity parity = Parity::NONE,
StopBits stopBits = StopBits::ONE>
struct Config {
static constexpr auto BAUD_RATE = baudRate;

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@@ -1,12 +1,14 @@
#pragma once
#define FORCE_INLINE __attribute__((always_inline))
#include "../clock.hpp"
#include <cmath>
#include <cstdint>
namespace uart {
enum class Mode {
ASYNCHRONOUS,
ASYNCHRONOUS_2X,
SYNCHRONOUS_MASTER,
SYNCHRONOUS_SLAVE,
SPI,
@@ -19,90 +21,160 @@ enum class Driven {
namespace detail {
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode,
Driven driven>
using reg_ptr_t = volatile std::uint8_t *;
template <std::uintptr_t Address>
static inline reg_ptr_t getRegPtr()
{
return reinterpret_cast<reg_ptr_t>(Address);
}
template <typename data_t, std::uint8_t Size>
struct RingBuffer {
std::uint8_t head;
std::uint8_t tail;
data_t buf[Size];
};
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Driven driven,
Mode mode>
class Hardware {
public:
static void init() FORCE_INLINE
[[gnu::always_inline]] static void init()
{
constexpr auto baudVal = calcBaud();
constexpr auto AbsDoubleError = std::fabs(calcBaudError<true>());
constexpr auto AbsNormalError = std::fabs(calcBaudError<false>());
static_assert(AbsDoubleError <= 3.0 || AbsNormalError <= 3.0, "Baud rate error over 3%, probably unusable");
*Registers::BAUD_REG_H = static_cast<uint8_t>(baudVal >> 8);
*Registers::BAUD_REG_L = static_cast<uint8_t>(baudVal);
constexpr auto UseDoubleSpeed = (AbsDoubleError < AbsNormalError);
constexpr auto BaudVal = calcBaudVal<UseDoubleSpeed>();
constexpr auto dataBitsVal = calcDataBits();
constexpr auto parityVal = calcParity();
constexpr auto stopBitsVal = calcStopBits();
constexpr auto modeVal = calcMode();
constexpr auto enableRx = calcRxState<true>();
constexpr auto enableTx = calcTxState<true>();
constexpr auto interruptVal = calcInterrupt();
*getRegPtr<Registers::BAUD_REG_H_ADDR>() = static_cast<std::uint8_t>(BaudVal >> 8);
*getRegPtr<Registers::BAUD_REG_L_ADDR>() = static_cast<std::uint8_t>(BaudVal);
constexpr uint8_t controlRegB = dataBitsVal.regBVal | enableRx | enableTx | interruptVal;
constexpr uint8_t controlRegC = dataBitsVal.regCVal | parityVal | stopBitsVal | modeVal;
constexpr auto DataBitsValues = calcDataBits();
constexpr auto ParityVal = calcParity();
constexpr auto StopBitsVal = calcStopBits();
constexpr auto ModeVal = calcMode();
constexpr auto EnableRx = calcRxState<true>();
constexpr auto EnableTx = calcTxState<true>();
constexpr auto InterruptVal = calcInterrupt();
*Registers::CTRL_STAT_REG_B = controlRegB;
*Registers::CTRL_STAT_REG_C = controlRegC;
constexpr std::uint8_t ControlRegB = DataBitsValues.regBVal | EnableRx | EnableTx | InterruptVal;
constexpr std::uint8_t ControlRegC = DataBitsValues.regCVal | ParityVal | StopBitsVal | ModeVal;
auto ctrlStatRegA = getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>();
if constexpr (UseDoubleSpeed)
*ctrlStatRegA = *ctrlStatRegA | (1 << CtrlFlagsA::SPEED_2X);
else
*ctrlStatRegA = *ctrlStatRegA & ~(1 << CtrlFlagsA::SPEED_2X);
*getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>() = ControlRegB;
*getRegPtr<Registers::CTRL_STAT_REG_C_ADDR>() = ControlRegC;
}
static bool rxByteBlocking(typename cfg::data_t &byte) FORCE_INLINE
[[gnu::always_inline]] static bool rxByteBlocking(typename cfg::data_t &byte)
{
if (*Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
byte = *Registers::IO_REG;
if (*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
byte = *getRegPtr<Registers::IO_REG_ADDR>();
return true;
}
return false;
}
static typename cfg::data_t rxByteInterrupt() FORCE_INLINE
[[gnu::always_inline]] static typename cfg::data_t rxByteInterrupt()
{
return *Registers::IO_REG;
return *getRegPtr<Registers::IO_REG_ADDR>();
}
static void txByteBlocking(const typename cfg::data_t &byte) FORCE_INLINE
[[gnu::always_inline]] static bool txEmpty()
{
while (!(*Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::DATA_REG_EMPTY)))
return *getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::DATA_REG_EMPTY);
}
[[gnu::always_inline]] static bool txComplete()
{
return *getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
}
[[gnu::always_inline]] static void clearTxComplete()
{
*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() |= (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
}
[[gnu::always_inline]] static void txByteBlocking(const typename cfg::data_t &byte)
{
while (!txEmpty())
;
*Registers::IO_REG = byte;
*getRegPtr<Registers::IO_REG_ADDR>() = byte;
}
static void txByteInterrupt(volatile const typename cfg::data_t &byte) FORCE_INLINE
[[gnu::always_inline]] static void txByteInterrupt(volatile const typename cfg::data_t &byte)
{
*Registers::IO_REG = byte;
*getRegPtr<Registers::IO_REG_ADDR>() = byte;
}
static bool peekBlocking() FORCE_INLINE
[[gnu::always_inline]] static bool peekBlocking()
{
if (*Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
if (*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
return true;
}
return false;
}
static void enableDataRegEmptyInt() FORCE_INLINE
[[gnu::always_inline]] static void enableDataRegEmptyInt()
{
*Registers::CTRL_STAT_REG_B |= (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
auto ctrlStatRegB = getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>();
*ctrlStatRegB = *ctrlStatRegB | (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
}
static void disableDataRegEmptyInt() FORCE_INLINE
[[gnu::always_inline]] static void disableDataRegEmptyInt()
{
*Registers::CTRL_STAT_REG_B &= ~(1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
auto ctrlStatRegB = getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>();
*ctrlStatRegB = *ctrlStatRegB & ~(1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
}
private:
struct DataBitsVal {
uint8_t regCVal = 0;
uint8_t regBVal = 0;
std::uint8_t regCVal = 0;
std::uint8_t regBVal = 0;
};
static constexpr auto calcBaud()
template <bool DoubleSpeed = true>
static constexpr auto calcBaudVal()
{
// The actual formula is (F_CPU / (16 * baudRate)) - 1, but this one has the advantage of rounding correctly
constexpr auto baudVal = (F_CPU + 8 * cfg::BAUD_RATE) / (16 * cfg::BAUD_RATE) - 1;
return baudVal;
if constexpr (DoubleSpeed) {
constexpr auto BaudVal = static_cast<std::uint16_t>(round(F_CPU / (8.0 * cfg::BAUD_RATE) - 1));
return BaudVal;
}
constexpr auto BaudVal = static_cast<std::uint16_t>(round(F_CPU / (16.0 * cfg::BAUD_RATE) - 1));
return BaudVal;
}
template <std::uint16_t BaudVal, bool DoubleSpeed = true>
static constexpr auto calcBaudRate()
{
if constexpr (DoubleSpeed) {
constexpr auto BaudRate = static_cast<std::uint32_t>(round(F_CPU / (8.0 * (BaudVal + 1))));
return BaudRate;
}
constexpr auto BaudRate = static_cast<std::uint32_t>(round(F_CPU / (16.0 * (BaudVal + 1))));
return BaudRate;
}
template <bool DoubleSpeed = true>
static constexpr auto calcBaudError()
{
constexpr auto BaudVal = calcBaudVal<DoubleSpeed>();
constexpr auto ClosestBaudRate = calcBaudRate<BaudVal, DoubleSpeed>();
constexpr auto BaudError = (static_cast<double>(ClosestBaudRate) / cfg::BAUD_RATE - 1) * 100;
return BaudError;
}
static constexpr auto calcDataBits()
@@ -133,7 +205,7 @@ class Hardware {
static constexpr auto calcParity()
{
uint8_t parityVal = 0;
std::uint8_t parityVal = 0;
if (cfg::PARITY == Parity::EVEN)
parityVal = (1 << CtrlFlagsC::PARITY_MODE_1);
@@ -145,7 +217,7 @@ class Hardware {
static constexpr auto calcStopBits()
{
uint8_t stopBitsVal = 0;
std::uint8_t stopBitsVal = 0;
if (cfg::STOP_BITS == StopBits::TWO)
stopBitsVal = (1 << CtrlFlagsC::STOP_BIT_SEL);
@@ -157,7 +229,7 @@ class Hardware {
{
static_assert(mode != Mode::SPI, "SPI mode can not be used with uart");
uint8_t modeVal = 0;
std::uint8_t modeVal = 0;
if (mode == Mode::SYNCHRONOUS_MASTER || mode == Mode::SYNCHRONOUS_SLAVE) {
modeVal = (1 << CtrlFlagsC::MODE_SEL_0);
@@ -166,23 +238,23 @@ class Hardware {
return modeVal;
}
template <bool enable>
template <bool Enable>
static constexpr auto calcRxState()
{
uint8_t enableVal = 0;
std::uint8_t enableVal = 0;
if (enable)
if (Enable)
enableVal = (1 << CtrlFlagsB::RX_ENABLE);
return enableVal;
}
template <bool enable>
template <bool Enable>
static constexpr auto calcTxState()
{
uint8_t enableVal = 0;
std::uint8_t enableVal = 0;
if (enable)
if (Enable)
enableVal = (1 << CtrlFlagsB::TX_ENABLE);
return enableVal;
@@ -190,24 +262,162 @@ class Hardware {
static constexpr auto calcInterrupt()
{
uint8_t interruptVal = 0;
std::uint8_t interruptVal = 0;
if (driven == Driven::INTERRUPT)
interruptVal |= (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE) | (1 << CtrlFlagsB::RX_INT_ENABLE);
interruptVal = (1 << CtrlFlagsB::RX_INT_ENABLE);
return interruptVal;
}
};
template <typename data_t, uint8_t Size>
struct RingBuffer {
uint8_t head;
uint8_t tail;
data_t buf[Size];
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
class BlockingHardware {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
[[gnu::always_inline]] static void init()
{
HardwareImpl::init();
}
[[gnu::always_inline]] static void txByte(const data_t &byte)
{
HardwareImpl::txByteBlocking(byte);
}
[[gnu::always_inline]] static bool rxByte(data_t &byte)
{
return HardwareImpl::rxByteBlocking(byte);
}
[[gnu::always_inline]] static bool peek(data_t &)
{
static_assert(util::always_false_v<data_t>, "Peek with data is not supported in blocking mode");
return false;
}
[[gnu::always_inline]] static bool peek()
{
return HardwareImpl::peekBlocking();
}
[[gnu::always_inline]] static void flushTx()
{
while (!HardwareImpl::txEmpty())
;
while (!HardwareImpl::txComplete())
;
HardwareImpl::clearTxComplete();
}
private:
using HardwareImpl = Hardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, Driven::BLOCKING, mode>;
};
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
class InterruptHardware {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
[[gnu::always_inline]] static void txByte(const data_t &byte)
{
std::uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
while (tmpHead == sm_txBuf.tail)
;
sm_txBuf.buf[tmpHead] = byte;
sm_txBuf.head = tmpHead;
HardwareImpl::enableDataRegEmptyInt();
}
[[gnu::always_inline]] static bool rxByte(data_t &byte)
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
std::uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
sm_rxBuf.tail = tmpTail;
return true;
}
[[gnu::always_inline]] static bool peek(data_t &byte)
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
std::uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
return true;
}
[[gnu::always_inline]] static bool peek()
{
return (sm_rxBuf.head != sm_rxBuf.tail);
}
[[gnu::always_inline]] static void flushTx()
{
while (sm_txBuf.head != sm_txBuf.tail)
;
while (!HardwareImpl::txEmpty())
;
while (!HardwareImpl::txComplete())
;
HardwareImpl::clearTxComplete();
}
protected:
[[gnu::always_inline]] static void rxIntHandler()
{
const auto data = HardwareImpl::rxByteInterrupt();
const std::uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
if (tmpHead != sm_rxBuf.tail) {
sm_rxBuf.head = tmpHead;
sm_rxBuf.buf[tmpHead] = data;
} else {
// TODO: Handle overflow
}
}
[[gnu::always_inline]] static void dataRegEmptyIntHandler()
{
if (sm_txBuf.head != sm_txBuf.tail) {
const std::uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
sm_txBuf.tail = tmpTail;
HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
} else
HardwareImpl::disableDataRegEmptyInt();
}
private:
using HardwareImpl = Hardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, Driven::INTERRUPT, mode>;
static constexpr auto TX_BUFFER_SIZE = 16;
static constexpr auto RX_BUFFER_SIZE = 16;
static volatile RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
static volatile RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
};
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
volatile RingBuffer<typename InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::data_t,
InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::TX_BUFFER_SIZE>
InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::sm_txBuf = {0, 0, {0}};
template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
volatile RingBuffer<typename InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::data_t,
InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::RX_BUFFER_SIZE>
InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::sm_rxBuf = {0, 0, {0}};
} // namespace detail
} // namespace uart
#undef FORCE_INLINE

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@@ -1,25 +1,45 @@
#pragma once
#include <cstdint>
#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/sfr_defs.h>
#include "config.hpp"
#include "hardware.hpp"
#define FORCE_INLINE __attribute__((always_inline))
namespace uart {
namespace detail {
#if defined(__AVR_ATmega1284P__)
#if defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega328P__)
/*
The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's:
constexpr auto *foo = ptr;
Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site.
The _SFR_ADDR macro in sfr_defs.h would give the address, but it does that by taking the address of the dereferenced
pointer and casts it to uint16_t, which is still not a legal constexpr.
The workaround therefore is to disable the pointer cast and dereference macro _MMIO_BYTE temporarily.
*/
#pragma push_macro("_MMIO_BYTE")
#undef _MMIO_BYTE
#define _MMIO_BYTE
struct Registers0 {
static constexpr volatile auto *IO_REG = &UDR0;
static constexpr volatile auto *CTRL_STAT_REG_A = &UCSR0A;
static constexpr volatile auto *CTRL_STAT_REG_B = &UCSR0B;
static constexpr volatile auto *CTRL_STAT_REG_C = &UCSR0C;
static constexpr volatile auto *BAUD_REG_L = &UBRR0L;
static constexpr volatile auto *BAUD_REG_H = &UBRR0H;
static constexpr std::uintptr_t IO_REG_ADDR = UDR0;
static constexpr std::uintptr_t CTRL_STAT_REG_A_ADDR = UCSR0A;
static constexpr std::uintptr_t CTRL_STAT_REG_B_ADDR = UCSR0B;
static constexpr std::uintptr_t CTRL_STAT_REG_C_ADDR = UCSR0C;
static constexpr std::uintptr_t BAUD_REG_L_ADDR = UBRR0L;
static constexpr std::uintptr_t BAUD_REG_H_ADDR = UBRR0H;
};
#pragma pop_macro("_MMIO_BYTE")
enum class ControlFlagsA0 {
MULTI_PROC_COMM_MODE = MPCM0,
SPEED_2X = U2X0,
@@ -59,20 +79,10 @@ constexpr int operator<<(const int &lhs, const ControlFlagsB0 &rhs) { return lhs
constexpr int operator<<(const int &lhs, const ControlFlagsC0 &rhs) { return lhs << static_cast<int>(rhs); }
// clang-format on
static void (*fnRx0IntHandler)() = nullptr;
static void (*fnDataReg0EmptyIntHandler)() = nullptr;
ISR(USART0_RX_vect)
{
if (fnRx0IntHandler)
fnRx0IntHandler();
}
ISR(USART0_UDRE_vect)
{
if (fnDataReg0EmptyIntHandler)
fnDataReg0EmptyIntHandler();
}
#if defined(__AVR_ATmega328P__)
#define USART0_RX_vect USART_RX_vect
#define USART0_UDRE_vect USART_UDRE_vect
#endif
#else
#error "This chip is not supported"
@@ -80,139 +90,63 @@ ISR(USART0_UDRE_vect)
} // namespace detail
template <Mode mode = Mode::ASYNCHRONOUS, class cfg = Config<>, Driven driven = Driven::INTERRUPT>
class Hardware0 {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
class Hardware0 : public detail::BlockingHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
detail::ControlFlagsC0, cfg, mode> {
};
static void init() FORCE_INLINE
template <class cfg, Mode mode>
class Hardware0<cfg, Driven::INTERRUPT, mode>
: public detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
detail::ControlFlagsC0, cfg, mode> {
public:
[[gnu::always_inline]] static void init()
{
HardwareImpl::init();
}
static void txByte(data_t byte) FORCE_INLINE
{
HardwareImpl::txByteBlocking(byte);
}
static bool rxByte(data_t &byte) FORCE_INLINE
{
return HardwareImpl::rxByteBlocking(byte);
}
static bool peek(data_t &byte) FORCE_INLINE
{
static_cast<void>(byte);
static_assert(driven == Driven::BLOCKING, "Peek with data is not supported in blocking mode");
return false;
}
static bool peek() FORCE_INLINE
{
return HardwareImpl::peekBlocking();
sei();
}
private:
using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
detail::ControlFlagsC0, cfg, mode, driven>;
};
detail::ControlFlagsC0, cfg, Driven::INTERRUPT, mode>;
template <Mode mode, class cfg>
class Hardware0<mode, cfg, Driven::INTERRUPT> {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
using InterruptHardwareImpl = detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0,
detail::ControlFlagsB0, detail::ControlFlagsC0, cfg, mode>;
static void init() FORCE_INLINE
// Must be friends with Uart interface to call these private handlers
template <class Driver>
friend class Uart;
[[gnu::always_inline]] static void rxIntHandler()
{
detail::fnRx0IntHandler = rxIntHandler;
detail::fnDataReg0EmptyIntHandler = dataRegEmptyIntHandler;
HardwareImpl::init();
InterruptHardwareImpl::rxIntHandler();
}
static void txByte(const data_t &byte) FORCE_INLINE
[[gnu::always_inline]] static void dataRegEmptyIntHandler()
{
uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
while (tmpHead == sm_txBuf.tail)
;
sm_txBuf.buf[tmpHead] = byte;
sm_txBuf.head = tmpHead;
HardwareImpl::enableDataRegEmptyInt();
}
static bool rxByte(data_t &byte) FORCE_INLINE
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
sm_rxBuf.tail = tmpTail;
return true;
}
static bool peek(data_t &byte) FORCE_INLINE
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
return true;
}
static bool peek() FORCE_INLINE
{
return (sm_rxBuf.head != sm_rxBuf.tail);
}
private:
using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
detail::ControlFlagsC0, cfg, mode, Driven::INTERRUPT>;
static constexpr auto TX_BUFFER_SIZE = 16;
static constexpr auto RX_BUFFER_SIZE = 16;
static volatile detail::RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
static volatile detail::RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
static void rxIntHandler()
{
uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
if (tmpHead != sm_rxBuf.tail) {
sm_rxBuf.head = tmpHead;
sm_rxBuf.buf[tmpHead] = HardwareImpl::rxByteInterrupt();
}
}
static void dataRegEmptyIntHandler() FORCE_INLINE
{
if (sm_txBuf.head != sm_txBuf.tail) {
uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
sm_txBuf.tail = tmpTail;
HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
} else
HardwareImpl::disableDataRegEmptyInt();
InterruptHardwareImpl::dataRegEmptyIntHandler();
}
};
template <Mode mode, class cfg>
volatile detail::RingBuffer<typename Hardware0<mode, cfg, Driven::INTERRUPT>::data_t,
Hardware0<mode, cfg, Driven::INTERRUPT>::TX_BUFFER_SIZE>
Hardware0<mode, cfg, Driven::INTERRUPT>::sm_txBuf = {0, 0, {0}};
template <Mode mode, class cfg>
volatile detail::RingBuffer<typename Hardware0<mode, cfg, Driven::INTERRUPT>::data_t,
Hardware0<mode, cfg, Driven::INTERRUPT>::RX_BUFFER_SIZE>
Hardware0<mode, cfg, Driven::INTERRUPT>::sm_rxBuf = {0, 0, {0}};
} // namespace uart
#undef FORCE_INLINE
//////////////////////////////////////////////////////////////////////////
// Forward declare interrupt functions to allow adding them as friends
extern "C" {
void USART0_RX_vect() __attribute__((signal));
void USART0_UDRE_vect() __attribute__((signal));
}
// clang-format off
#define REGISTER_UART0_INT_VECTORS(uart_type) \
ISR(USART0_RX_vect) \
{ \
uart_type::rxIntHandler(); \
} \
ISR(USART0_UDRE_vect) \
{ \
uart_type::dataRegEmptyIntHandler(); \
} \
struct _##uart_type {}
// clang-format on

View File

@@ -1,25 +1,45 @@
#pragma once
#include <cstdint>
#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/sfr_defs.h>
#include "config.hpp"
#include "hardware.hpp"
#define FORCE_INLINE __attribute__((always_inline))
namespace uart {
namespace detail {
#if defined(__AVR_ATmega1284P__)
/*
The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's:
constexpr auto *foo = ptr;
Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site.
The _SFR_ADDR macro in sfr_defs.h would give the address, but it does that by taking the address of the dereferenced
pointer and casts it to uint16_t, which is still not a legal constexpr.
The workaround therefore is to disable the pointer cast and dereference macro _MMIO_BYTE temporarily.
*/
#pragma push_macro("_MMIO_BYTE")
#undef _MMIO_BYTE
#define _MMIO_BYTE
struct Registers1 {
static constexpr volatile auto *IO_REG = &UDR1;
static constexpr volatile auto *CTRL_STAT_REG_A = &UCSR1A;
static constexpr volatile auto *CTRL_STAT_REG_B = &UCSR1B;
static constexpr volatile auto *CTRL_STAT_REG_C = &UCSR1C;
static constexpr volatile auto *BAUD_REG_L = &UBRR1L;
static constexpr volatile auto *BAUD_REG_H = &UBRR1H;
static constexpr std::uintptr_t IO_REG_ADDR = UDR1;
static constexpr std::uintptr_t CTRL_STAT_REG_A_ADDR = UCSR1A;
static constexpr std::uintptr_t CTRL_STAT_REG_B_ADDR = UCSR1B;
static constexpr std::uintptr_t CTRL_STAT_REG_C_ADDR = UCSR1C;
static constexpr std::uintptr_t BAUD_REG_L_ADDR = UBRR1L;
static constexpr std::uintptr_t BAUD_REG_H_ADDR = UBRR1H;
};
#pragma pop_macro("_MMIO_BYTE")
enum class ControlFlagsA1 {
MULTI_PROC_COMM_MODE = MPCM1,
SPEED_2X = U2X1,
@@ -59,166 +79,79 @@ constexpr int operator<<(const int &lhs, const ControlFlagsB1 &rhs) { return lhs
constexpr int operator<<(const int &lhs, const ControlFlagsC1 &rhs) { return lhs << static_cast<int>(rhs); }
// clang-format on
static void (*fnRx1IntHandler)() = nullptr;
static void (*fnDataReg1EmptyIntHandler)() = nullptr;
ISR(USART1_RX_vect)
{
if (fnRx1IntHandler)
fnRx1IntHandler();
}
ISR(USART1_UDRE_vect)
{
if (fnDataReg1EmptyIntHandler)
fnDataReg1EmptyIntHandler();
}
#define HAS_UART1
#else
#error "This chip is not supported"
#endif
} // namespace detail
#ifdef HAS_UART1
template <Mode mode = Mode::ASYNCHRONOUS, class cfg = Config<>, Driven driven = Driven::INTERRUPT>
class Hardware1 {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
class Hardware1 : public detail::BlockingHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
detail::ControlFlagsC1, cfg, mode> {
};
static void init() FORCE_INLINE
template <class cfg, Mode mode>
class Hardware1<cfg, Driven::INTERRUPT, mode>
: public detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
detail::ControlFlagsC1, cfg, mode> {
public:
[[gnu::always_inline]] static void init()
{
HardwareImpl::init();
}
static void txByte(const data_t &byte) FORCE_INLINE
{
HardwareImpl::txByteBlocking(byte);
}
static bool rxByte(data_t &byte) FORCE_INLINE
{
return HardwareImpl::rxByteBlocking(byte);
}
static bool peek(data_t &byte) FORCE_INLINE
{
static_cast<void>(byte);
static_assert(driven != Driven::BLOCKING, "Peek with data is not supported in blocking mode");
return false;
}
static bool peek() FORCE_INLINE
{
return HardwareImpl::peekBlocking();
sei();
}
private:
using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
detail::ControlFlagsC1, cfg, mode, driven>;
};
detail::ControlFlagsC1, cfg, Driven::INTERRUPT, mode>;
template <Mode mode, class cfg>
class Hardware1<mode, cfg, Driven::INTERRUPT> {
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;
using InterruptHardwareImpl = detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1,
detail::ControlFlagsB1, detail::ControlFlagsC1, cfg, mode>;
static void init() FORCE_INLINE
// Must be friends with Uart interface to call these private handlers
template <class Driver>
friend class Uart;
[[gnu::always_inline]] static void rxIntHandler()
{
detail::fnRx1IntHandler = rxIntHandler;
detail::fnDataReg1EmptyIntHandler = dataRegEmptyIntHandler;
HardwareImpl::init();
InterruptHardwareImpl::rxIntHandler();
}
static void txByte(const data_t &byte) FORCE_INLINE
[[gnu::always_inline]] static void dataRegEmptyIntHandler()
{
uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
while (tmpHead == sm_txBuf.tail)
;
sm_txBuf.buf[tmpHead] = byte;
sm_txBuf.head = tmpHead;
HardwareImpl::enableDataRegEmptyInt();
}
static bool rxByte(data_t &byte) FORCE_INLINE
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
sm_rxBuf.tail = tmpTail;
return true;
}
static bool peek(data_t &byte) FORCE_INLINE
{
if (sm_rxBuf.head == sm_rxBuf.tail)
return false;
uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
byte = sm_rxBuf.buf[tmpTail];
return true;
}
static bool peek() FORCE_INLINE
{
return (sm_rxBuf.head != sm_rxBuf.tail);
}
private:
using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
detail::ControlFlagsC1, cfg, mode, Driven::INTERRUPT>;
static constexpr auto TX_BUFFER_SIZE = 16;
static constexpr auto RX_BUFFER_SIZE = 16;
static volatile detail::RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
static volatile detail::RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
static void rxIntHandler()
{
uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
if (tmpHead != sm_rxBuf.tail) {
sm_rxBuf.head = tmpHead;
sm_rxBuf.buf[tmpHead] = HardwareImpl::rxByteInterrupt();
}
}
static void dataRegEmptyIntHandler() FORCE_INLINE
{
if (sm_txBuf.head != sm_txBuf.tail) {
uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
sm_txBuf.tail = tmpTail;
HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
} else
HardwareImpl::disableDataRegEmptyInt();
InterruptHardwareImpl::dataRegEmptyIntHandler();
}
};
template <Mode mode, class cfg>
volatile detail::RingBuffer<typename Hardware1<mode, cfg, Driven::INTERRUPT>::data_t,
Hardware1<mode, cfg, Driven::INTERRUPT>::TX_BUFFER_SIZE>
Hardware1<mode, cfg, Driven::INTERRUPT>::sm_txBuf = {0, 0, {0}};
template <Mode mode, class cfg>
volatile detail::RingBuffer<typename Hardware1<mode, cfg, Driven::INTERRUPT>::data_t,
Hardware1<mode, cfg, Driven::INTERRUPT>::RX_BUFFER_SIZE>
Hardware1<mode, cfg, Driven::INTERRUPT>::sm_rxBuf = {0, 0, {0}};
#endif
} // namespace uart
#undef FORCE_INLINE
//////////////////////////////////////////////////////////////////////////
#ifdef HAS_UART1
// Forward declare interrupt functions to allow adding them as friends
extern "C" {
void USART1_RX_vect() __attribute__((signal));
void USART1_UDRE_vect() __attribute__((signal));
}
// clang-format off
#define REGISTER_UART1_INT_VECTORS(uart_type) \
ISR(USART1_RX_vect) \
{ \
uart_type::rxIntHandler(); \
} \
ISR(USART1_UDRE_vect) \
{ \
uart_type::dataRegEmptyIntHandler(); \
} \
struct _##uart_type { \
}
// clang-format off
#endif

View File

@@ -3,11 +3,14 @@
#include "config.hpp"
#include "../io/io.hpp"
#include "../util/util.hpp"
namespace uart {
template <io::P rxPin, io::P txPin, class cfg = Config<>>
class Software {
static_assert(util::always_false_v<cfg>, "Not implemented");
public:
using data_t = typename cfg::data_t;
static constexpr auto DATA_BITS = cfg::DATA_BITS;

754
uart.cpp
View File

@@ -1,754 +0,0 @@
/*************************************************************************
Title: Interrupt UART library with receive/transmit circular buffers
Author: Peter Fleury <pfleury@gmx.ch> http://tinyurl.com/peterfleury
File: $Id: uart.c,v 1.15.2.4 2015/09/05 18:33:32 peter Exp $
Software: AVR-GCC 4.x
Hardware: any AVR with built-in UART,
License: GNU General Public License
DESCRIPTION:
An interrupt is generated when the UART has finished transmitting or
receiving a byte. The interrupt handling routines use circular buffers
for buffering received and transmitted data.
The UART_RX_BUFFER_SIZE and UART_TX_BUFFER_SIZE variables define
the buffer size in bytes. Note that these variables must be a
power of 2.
USAGE:
Refere to the header file uart.h for a description of the routines.
See also example test_uart.c.
NOTES:
Based on Atmel Application Note AVR306
LICENSE:
Copyright (C) 2015 Peter Fleury, GNU General Public License Version 3
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*************************************************************************/
#include "uart.h"
#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/pgmspace.h>
/*
* constants and macros
*/
/* size of RX/TX buffers */
#define UART_RX_BUFFER_MASK (UART_RX_BUFFER_SIZE - 1)
#define UART_TX_BUFFER_MASK (UART_TX_BUFFER_SIZE - 1)
#if (UART_RX_BUFFER_SIZE & UART_RX_BUFFER_MASK)
#error RX buffer size is not a power of 2
#endif
#if (UART_TX_BUFFER_SIZE & UART_TX_BUFFER_MASK)
#error TX buffer size is not a power of 2
#endif
#if defined(__AVR_AT90S2313__) || defined(__AVR_AT90S4414__) || defined(__AVR_AT90S8515__) || \
defined(__AVR_AT90S4434__) || defined(__AVR_AT90S8535__) || defined(__AVR_ATmega103__)
/* old AVR classic or ATmega103 with one UART */
#define UART0_RECEIVE_INTERRUPT UART_RX_vect
#define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
#define UART0_STATUS USR
#define UART0_CONTROL UCR
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRR
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__)
/* old AVR classic with one UART */
#define UART0_RECEIVE_INTERRUPT UART_RX_vect
#define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRR
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#elif defined(__AVR_AT90PWM216__) || defined(__AVR_AT90PWM316__)
/* AT90PWN216/316 with one USART */
#define UART0_RECEIVE_INTERRUPT USART_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_CONTROLC UCSRC
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRRL
#define UART0_UBRRH UBRRH
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#define UART0_BIT_UCSZ0 UCSZ0
#define UART0_BIT_UCSZ1 UCSZ1
#elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega8A__) || defined(__AVR_ATmega16__) || \
defined(__AVR_ATmega16A__) || defined(__AVR_ATmega32__) || defined(__AVR_ATmega32A__) || \
defined(__AVR_ATmega323__)
/* ATmega with one USART */
#define UART0_RECEIVE_INTERRUPT USART_RXC_vect
#define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_CONTROLC UCSRC
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRRL
#define UART0_UBRRH UBRRH
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#define UART0_BIT_UCSZ0 UCSZ0
#define UART0_BIT_UCSZ1 UCSZ1
#define UART0_BIT_URSEL URSEL
#elif defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__)
#define UART0_RECEIVE_INTERRUPT USART_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_CONTROLC UCSRC
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRRL
#define UART0_UBRRH UBRRH
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#define UART0_BIT_UCSZ0 UCSZ0
#define UART0_BIT_UCSZ1 UCSZ1
#define UART0_BIT_URSEL URSEL
#elif defined(__AVR_ATmega163__)
/* ATmega163 with one UART */
#define UART0_RECEIVE_INTERRUPT UART_RX_vect
#define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRR
#define UART0_UBRRH UBRRHI
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#elif defined(__AVR_ATmega162__)
/* ATmega with two USART */
#define ATMEGA_USART1
#define UART0_RECEIVE_INTERRUPT USART0_RXC_vect
#define UART1_RECEIVE_INTERRUPT USART1_RXC_vect
#define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
#define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
#define UART0_STATUS UCSR0A
#define UART0_CONTROL UCSR0B
#define UART0_CONTROLC UCSR0C
#define UART0_DATA UDR0
#define UART0_UDRIE UDRIE0
#define UART0_UBRRL UBRR0L
#define UART0_UBRRH UBRR0H
#define UART0_BIT_URSEL URSEL0
#define UART0_BIT_U2X U2X0
#define UART0_BIT_RXCIE RXCIE0
#define UART0_BIT_RXEN RXEN0
#define UART0_BIT_TXEN TXEN0
#define UART0_BIT_UCSZ0 UCSZ00
#define UART0_BIT_UCSZ1 UCSZ01
#define UART1_STATUS UCSR1A
#define UART1_CONTROL UCSR1B
#define UART1_CONTROLC UCSR1C
#define UART1_DATA UDR1
#define UART1_UDRIE UDRIE1
#define UART1_UBRRL UBRR1L
#define UART1_UBRRH UBRR1H
#define UART1_BIT_URSEL URSEL1
#define UART1_BIT_U2X U2X1
#define UART1_BIT_RXCIE RXCIE1
#define UART1_BIT_RXEN RXEN1
#define UART1_BIT_TXEN TXEN1
#define UART1_BIT_UCSZ0 UCSZ10
#define UART1_BIT_UCSZ1 UCSZ11
#elif defined(__AVR_ATmega161__)
/* ATmega with UART */
#error "AVR ATmega161 currently not supported by this libaray !"
#elif defined(__AVR_ATmega169__)
/* ATmega with one USART */
#define UART0_RECEIVE_INTERRUPT USART0_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_CONTROLC UCSRC
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRRL
#define UART0_UBRRH UBRRH
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#define UART0_BIT_UCSZ0 UCSZ0
#define UART0_BIT_UCSZ1 UCSZ1
#elif defined(__AVR_ATmega48__) || defined(__AVR_ATmega48A__) || defined(__AVR_ATmega48P__) || \
defined(__AVR_ATmega48PA__) || defined(__AVR_ATmega48PB__) || defined(__AVR_ATmega88__) || \
defined(__AVR_ATmega88A__) || defined(__AVR_ATmega88P__) || defined(__AVR_ATmega88PA__) || \
defined(__AVR_ATmega88PB__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega168A__) || \
defined(__AVR_ATmega168P__) || defined(__AVR_ATmega168PA__) || defined(__AVR_ATmega168PB__) || \
defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega3250__) || \
defined(__AVR_ATmega3290__) || defined(__AVR_ATmega6450__) || defined(__AVR_ATmega6490__)
/* ATmega with one USART */
#define UART0_RECEIVE_INTERRUPT USART_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
#define UART0_STATUS UCSR0A
#define UART0_CONTROL UCSR0B
#define UART0_CONTROLC UCSR0C
#define UART0_DATA UDR0
#define UART0_UDRIE UDRIE0
#define UART0_UBRRL UBRR0L
#define UART0_UBRRH UBRR0H
#define UART0_BIT_U2X U2X0
#define UART0_BIT_RXCIE RXCIE0
#define UART0_BIT_RXEN RXEN0
#define UART0_BIT_TXEN TXEN0
#define UART0_BIT_UCSZ0 UCSZ00
#define UART0_BIT_UCSZ1 UCSZ01
#elif defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny2313A__) || defined(__AVR_ATtiny4313__)
/* ATtiny with one USART */
#define UART0_RECEIVE_INTERRUPT USART_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
#define UART0_STATUS UCSRA
#define UART0_CONTROL UCSRB
#define UART0_CONTROLC UCSRC
#define UART0_DATA UDR
#define UART0_UDRIE UDRIE
#define UART0_UBRRL UBRRL
#define UART0_UBRRH UBRRH
#define UART0_BIT_U2X U2X
#define UART0_BIT_RXCIE RXCIE
#define UART0_BIT_RXEN RXEN
#define UART0_BIT_TXEN TXEN
#define UART0_BIT_UCSZ0 UCSZ0
#define UART0_BIT_UCSZ1 UCSZ1
#elif defined(__AVR_ATmega329__) || defined(__AVR_ATmega649__) || defined(__AVR_ATmega3290__) || \
defined(__AVR_ATmega6490__) || defined(__AVR_ATmega169A__) || defined(__AVR_ATmega169PA__) || \
defined(__AVR_ATmega329A__) || defined(__AVR_ATmega329PA__) || defined(__AVR_ATmega3290A__) || \
defined(__AVR_ATmega3290PA__) || defined(__AVR_ATmega649A__) || defined(__AVR_ATmega649P__) || \
defined(__AVR_ATmega6490A__) || defined(__AVR_ATmega6490P__) || defined(__AVR_ATmega165__) || \
defined(__AVR_ATmega325__) || defined(__AVR_ATmega645__) || defined(__AVR_ATmega3250__) || \
defined(__AVR_ATmega6450__) || defined(__AVR_ATmega165A__) || defined(__AVR_ATmega165PA__) || \
defined(__AVR_ATmega325A__) || defined(__AVR_ATmega325PA__) || defined(__AVR_ATmega3250A__) || \
defined(__AVR_ATmega3250PA__) || defined(__AVR_ATmega645A__) || defined(__AVR_ATmega645PA__) || \
defined(__AVR_ATmega6450A__) || defined(__AVR_ATmega6450PA__) || defined(__AVR_ATmega644__)
/* ATmega with one USART */
#define UART0_RECEIVE_INTERRUPT USART0_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
#define UART0_STATUS UCSR0A
#define UART0_CONTROL UCSR0B
#define UART0_CONTROLC UCSR0C
#define UART0_DATA UDR0
#define UART0_UDRIE UDRIE0
#define UART0_UBRRL UBRR0L
#define UART0_UBRRH UBRR0H
#define UART0_BIT_U2X U2X0
#define UART0_BIT_RXCIE RXCIE0
#define UART0_BIT_RXEN RXEN0
#define UART0_BIT_TXEN TXEN0
#define UART0_BIT_UCSZ0 UCSZ00
#define UART0_BIT_UCSZ1 UCSZ01
#elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__) || defined(__AVR_ATmega128A__) || \
defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || \
defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) || defined(__AVR_ATmega164P__) || \
defined(__AVR_ATmega324P__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega164A__) || \
defined(__AVR_ATmega164PA__) || defined(__AVR_ATmega324A__) || defined(__AVR_ATmega324PA__) || \
defined(__AVR_ATmega644A__) || defined(__AVR_ATmega644PA__) || defined(__AVR_ATmega1284__) || \
defined(__AVR_ATmega1284P__) || defined(__AVR_ATtiny1634__)
/* ATmega with two USART */
#define ATMEGA_USART1
#define UART0_RECEIVE_INTERRUPT USART0_RX_vect
#define UART1_RECEIVE_INTERRUPT USART1_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
#define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
#define UART0_STATUS UCSR0A
#define UART0_CONTROL UCSR0B
#define UART0_CONTROLC UCSR0C
#define UART0_DATA UDR0
#define UART0_UDRIE UDRIE0
#define UART0_UBRRL UBRR0L
#define UART0_UBRRH UBRR0H
#define UART0_BIT_U2X U2X0
#define UART0_BIT_RXCIE RXCIE0
#define UART0_BIT_RXEN RXEN0
#define UART0_BIT_TXEN TXEN0
#define UART0_BIT_UCSZ0 UCSZ00
#define UART0_BIT_UCSZ1 UCSZ01
#define UART1_STATUS UCSR1A
#define UART1_CONTROL UCSR1B
#define UART1_CONTROLC UCSR1C
#define UART1_DATA UDR1
#define UART1_UDRIE UDRIE1
#define UART1_UBRRL UBRR1L
#define UART1_UBRRH UBRR1H
#define UART1_BIT_U2X U2X1
#define UART1_BIT_RXCIE RXCIE1
#define UART1_BIT_RXEN RXEN1
#define UART1_BIT_TXEN TXEN1
#define UART1_BIT_UCSZ0 UCSZ10
#define UART1_BIT_UCSZ1 UCSZ11
#elif defined(__AVR_ATmega8U2__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || \
defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB82__) || \
defined(__AVR_AT90USB162__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__) || \
defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1287__)
#define UART0_RECEIVE_INTERRUPT USART1_RX_vect
#define UART0_TRANSMIT_INTERRUPT USART1_UDRE_vect
#define UART0_STATUS UCSR1A
#define UART0_CONTROL UCSR1B
#define UART0_CONTROLC UCSR1C
#define UART0_DATA UDR1
#define UART0_UDRIE UDRIE1
#define UART0_UBRRL UBRR1L
#define UART0_UBRRH UBRR1H
#define UART0_BIT_U2X U2X1
#define UART0_BIT_RXCIE RXCIE1
#define UART0_BIT_RXEN RXEN1
#define UART0_BIT_TXEN TXEN1
#define UART0_BIT_UCSZ0 UCSZ10
#define UART0_BIT_UCSZ1 UCSZ11
#else
#error "no UART definition for MCU available"
#endif
/*
* module global variables
*/
static volatile unsigned char UART_TxBuf[UART_TX_BUFFER_SIZE];
static volatile unsigned char UART_RxBuf[UART_RX_BUFFER_SIZE];
static volatile unsigned char UART_TxHead;
static volatile unsigned char UART_TxTail;
static volatile unsigned char UART_RxHead;
static volatile unsigned char UART_RxTail;
static volatile unsigned char UART_LastRxError;
#if defined(ATMEGA_USART1)
static volatile unsigned char UART1_TxBuf[UART_TX_BUFFER_SIZE];
static volatile unsigned char UART1_RxBuf[UART_RX_BUFFER_SIZE];
static volatile unsigned char UART1_TxHead;
static volatile unsigned char UART1_TxTail;
static volatile unsigned char UART1_RxHead;
static volatile unsigned char UART1_RxTail;
static volatile unsigned char UART1_LastRxError;
#endif
ISR(UART0_RECEIVE_INTERRUPT)
/*************************************************************************
Function: UART Receive Complete interrupt
Purpose: called when the UART has received a character
**************************************************************************/
{
unsigned char tmphead;
unsigned char data;
unsigned char usr;
unsigned char lastRxError;
/* read UART status register and UART data register */
usr = UART0_STATUS;
data = UART0_DATA;
/* get FEn (Frame Error) DORn (Data OverRun) UPEn (USART Parity Error) bits */
#if defined(FE) && defined(DOR) && defined(UPE)
lastRxError = usr & (_BV(FE) | _BV(DOR) | _BV(UPE));
#elif defined(FE0) && defined(DOR0) && defined(UPE0)
lastRxError = usr & (_BV(FE0) | _BV(DOR0) | _BV(UPE0));
#elif defined(FE1) && defined(DOR1) && defined(UPE1)
lastRxError = usr & (_BV(FE1) | _BV(DOR1) | _BV(UPE1));
#elif defined(FE) && defined(DOR)
lastRxError = usr & (_BV(FE) | _BV(DOR));
#endif
/* calculate buffer index */
tmphead = (UART_RxHead + 1) & UART_RX_BUFFER_MASK;
if (tmphead == UART_RxTail) {
/* error: receive buffer overflow */
lastRxError = UART_BUFFER_OVERFLOW >> 8;
} else {
/* store new index */
UART_RxHead = tmphead;
/* store received data in buffer */
UART_RxBuf[tmphead] = data;
}
UART_LastRxError |= lastRxError;
}
ISR(UART0_TRANSMIT_INTERRUPT)
/*************************************************************************
Function: UART Data Register Empty interrupt
Purpose: called when the UART is ready to transmit the next byte
**************************************************************************/
{
unsigned char tmptail;
if (UART_TxHead != UART_TxTail) {
/* calculate and store new buffer index */
tmptail = (UART_TxTail + 1) & UART_TX_BUFFER_MASK;
UART_TxTail = tmptail;
/* get one byte from buffer and write it to UART */
UART0_DATA = UART_TxBuf[tmptail]; /* start transmission */
} else {
/* tx buffer empty, disable UDRE interrupt */
UART0_CONTROL &= ~_BV(UART0_UDRIE);
}
}
/*************************************************************************
Function: uart_init()
Purpose: initialize UART and set baudrate
Input: baudrate using macro UART_BAUD_SELECT()
Returns: none
**************************************************************************/
void uart_init(unsigned int baudrate)
{
UART_TxHead = 0;
UART_TxTail = 0;
UART_RxHead = 0;
UART_RxTail = 0;
#ifdef UART_TEST
#ifndef UART0_BIT_U2X
#warning "UART0_BIT_U2X not defined"
#endif
#ifndef UART0_UBRRH
#warning "UART0_UBRRH not defined"
#endif
#ifndef UART0_CONTROLC
#warning "UART0_CONTROLC not defined"
#endif
#if defined(URSEL) || defined(URSEL0)
#ifndef UART0_BIT_URSEL
#warning "UART0_BIT_URSEL not defined"
#endif
#endif
#endif
/* Set baud rate */
if (baudrate & 0x8000) {
#if UART0_BIT_U2X
UART0_STATUS = (1 << UART0_BIT_U2X); // Enable 2x speed
#endif
}
#if defined(UART0_UBRRH)
UART0_UBRRH = (unsigned char)((baudrate >> 8) & 0x80);
#endif
UART0_UBRRL = (unsigned char)(baudrate & 0x00FF);
/* Enable USART receiver and transmitter and receive complete interrupt */
UART0_CONTROL = _BV(UART0_BIT_RXCIE) | (1 << UART0_BIT_RXEN) | (1 << UART0_BIT_TXEN);
/* Set frame format: asynchronous, 8data, no parity, 1stop bit */
#ifdef UART0_CONTROLC
#ifdef UART0_BIT_URSEL
UART0_CONTROLC = (1 << UART0_BIT_URSEL) | (1 << UART0_BIT_UCSZ1) | (1 << UART0_BIT_UCSZ0);
#else
UART0_CONTROLC = (1 << UART0_BIT_UCSZ1) | (1 << UART0_BIT_UCSZ0);
#endif
#endif
} /* uart_init */
/*************************************************************************
Function: uart_getc()
Purpose: return byte from ringbuffer
Returns: lower byte: received byte from ringbuffer
higher byte: last receive error
**************************************************************************/
unsigned int uart_getc(void)
{
unsigned char tmptail;
unsigned char data;
unsigned char lastRxError;
if (UART_RxHead == UART_RxTail) {
return UART_NO_DATA; /* no data available */
}
/* calculate buffer index */
tmptail = (UART_RxTail + 1) & UART_RX_BUFFER_MASK;
/* get data from receive buffer */
data = UART_RxBuf[tmptail];
lastRxError = UART_LastRxError;
/* store buffer index */
UART_RxTail = tmptail;
UART_LastRxError = 0;
return (lastRxError << 8) + data;
} /* uart_getc */
/*************************************************************************
Function: uart_putc()
Purpose: write byte to ringbuffer for transmitting via UART
Input: byte to be transmitted
Returns: none
**************************************************************************/
void uart_putc(unsigned char data)
{
unsigned char tmphead;
tmphead = (UART_TxHead + 1) & UART_TX_BUFFER_MASK;
while (tmphead == UART_TxTail) {
; /* wait for free space in buffer */
}
UART_TxBuf[tmphead] = data;
UART_TxHead = tmphead;
/* enable UDRE interrupt */
UART0_CONTROL |= _BV(UART0_UDRIE);
} /* uart_putc */
/*************************************************************************
Function: uart_puts()
Purpose: transmit string to UART
Input: string to be transmitted
Returns: none
**************************************************************************/
void uart_puts(const char *s)
{
while (*s)
uart_putc(*s++);
} /* uart_puts */
/*************************************************************************
Function: uart_puts_p()
Purpose: transmit string from program memory to UART
Input: program memory string to be transmitted
Returns: none
**************************************************************************/
void uart_puts_p(const char *progmem_s)
{
register char c;
while ((c = pgm_read_byte(progmem_s++)))
uart_putc(c);
} /* uart_puts_p */
/*
* these functions are only for ATmegas with two USART
*/
#if defined(ATMEGA_USART1)
ISR(UART1_RECEIVE_INTERRUPT)
/*************************************************************************
Function: UART1 Receive Complete interrupt
Purpose: called when the UART1 has received a character
**************************************************************************/
{
unsigned char tmphead;
unsigned char data;
unsigned char usr;
unsigned char lastRxError;
/* read UART status register and UART data register */
usr = UART1_STATUS;
data = UART1_DATA;
/* get FEn (Frame Error) DORn (Data OverRun) UPEn (USART Parity Error) bits */
lastRxError = usr & (_BV(FE1) | _BV(DOR1) | _BV(UPE1));
/* calculate buffer index */
tmphead = (UART1_RxHead + 1) & UART_RX_BUFFER_MASK;
if (tmphead == UART1_RxTail) {
/* error: receive buffer overflow */
lastRxError = UART_BUFFER_OVERFLOW >> 8;
} else {
/* store new index */
UART1_RxHead = tmphead;
/* store received data in buffer */
UART1_RxBuf[tmphead] = data;
}
UART1_LastRxError |= lastRxError;
}
ISR(UART1_TRANSMIT_INTERRUPT)
/*************************************************************************
Function: UART1 Data Register Empty interrupt
Purpose: called when the UART1 is ready to transmit the next byte
**************************************************************************/
{
unsigned char tmptail;
if (UART1_TxHead != UART1_TxTail) {
/* calculate and store new buffer index */
tmptail = (UART1_TxTail + 1) & UART_TX_BUFFER_MASK;
UART1_TxTail = tmptail;
/* get one byte from buffer and write it to UART */
UART1_DATA = UART1_TxBuf[tmptail]; /* start transmission */
} else {
/* tx buffer empty, disable UDRE interrupt */
UART1_CONTROL &= ~_BV(UART1_UDRIE);
}
}
/*************************************************************************
Function: uart1_init()
Purpose: initialize UART1 and set baudrate
Input: baudrate using macro UART_BAUD_SELECT()
Returns: none
**************************************************************************/
void uart1_init(unsigned int baudrate)
{
UART1_TxHead = 0;
UART1_TxTail = 0;
UART1_RxHead = 0;
UART1_RxTail = 0;
#ifdef UART_TEST
#ifndef UART1_BIT_U2X
#warning "UART1_BIT_U2X not defined"
#endif
#ifndef UART1_UBRRH
#warning "UART1_UBRRH not defined"
#endif
#ifndef UART1_CONTROLC
#warning "UART1_CONTROLC not defined"
#endif
#if defined(URSEL) || defined(URSEL1)
#ifndef UART1_BIT_URSEL
#warning "UART1_BIT_URSEL not defined"
#endif
#endif
#endif
/* Set baud rate */
if (baudrate & 0x8000) {
#if UART1_BIT_U2X
UART1_STATUS = (1 << UART1_BIT_U2X); // Enable 2x speed
#endif
}
UART1_UBRRH = (unsigned char)((baudrate >> 8) & 0x80);
UART1_UBRRL = (unsigned char)baudrate;
/* Enable USART receiver and transmitter and receive complete interrupt */
UART1_CONTROL = _BV(UART1_BIT_RXCIE) | (1 << UART1_BIT_RXEN) | (1 << UART1_BIT_TXEN);
/* Set frame format: asynchronous, 8data, no parity, 1stop bit */
#ifdef UART1_BIT_URSEL
UART1_CONTROLC = (1 << UART1_BIT_URSEL) | (1 << UART1_BIT_UCSZ1) | (1 << UART1_BIT_UCSZ0);
#else
UART1_CONTROLC = (1 << UART1_BIT_UCSZ1) | (1 << UART1_BIT_UCSZ0);
#endif
} /* uart_init */
/*************************************************************************
Function: uart1_getc()
Purpose: return byte from ringbuffer
Returns: lower byte: received byte from ringbuffer
higher byte: last receive error
**************************************************************************/
unsigned int uart1_getc(void)
{
unsigned char tmptail;
unsigned int data;
unsigned char lastRxError;
if (UART1_RxHead == UART1_RxTail) {
return UART_NO_DATA; /* no data available */
}
/* calculate buffer index */
tmptail = (UART1_RxTail + 1) & UART_RX_BUFFER_MASK;
/* get data from receive buffer */
data = UART1_RxBuf[tmptail];
lastRxError = UART1_LastRxError;
/* store buffer index */
UART1_RxTail = tmptail;
UART1_LastRxError = 0;
return (lastRxError << 8) + data;
} /* uart1_getc */
/*************************************************************************
Function: uart1_putc()
Purpose: write byte to ringbuffer for transmitting via UART
Input: byte to be transmitted
Returns: none
**************************************************************************/
void uart1_putc(unsigned char data)
{
unsigned char tmphead;
tmphead = (UART1_TxHead + 1) & UART_TX_BUFFER_MASK;
while (tmphead == UART1_TxTail) {
; /* wait for free space in buffer */
}
UART1_TxBuf[tmphead] = data;
UART1_TxHead = tmphead;
/* enable UDRE interrupt */
UART1_CONTROL |= _BV(UART1_UDRIE);
} /* uart1_putc */
/*************************************************************************
Function: uart1_puts()
Purpose: transmit string to UART1
Input: string to be transmitted
Returns: none
**************************************************************************/
void uart1_puts(const char *s)
{
while (*s)
uart1_putc(*s++);
} /* uart1_puts */
/*************************************************************************
Function: uart1_puts_p()
Purpose: transmit string from program memory to UART1
Input: program memory string to be transmitted
Returns: none
**************************************************************************/
void uart1_puts_p(const char *progmem_s)
{
register char c;
while ((c = pgm_read_byte(progmem_s++)))
uart1_putc(c);
} /* uart1_puts_p */
#endif

196
uart.h
View File

@@ -1,196 +0,0 @@
#ifndef UART_H
#define UART_H
/************************************************************************
Title: Interrupt UART library with receive/transmit circular buffers
Author: Peter Fleury <pfleury@gmx.ch> http://tinyurl.com/peterfleury
File: $Id: uart.h,v 1.13 2015/01/11 13:53:25 peter Exp $
Software: AVR-GCC 4.x, AVR Libc 1.4 or higher
Hardware: any AVR with built-in UART/USART
Usage: see Doxygen manual
LICENSE:
Copyright (C) 2015 Peter Fleury, GNU General Public License Version 3
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
************************************************************************/
/**
* @file
* @defgroup pfleury_uart UART Library <uart.h>
* @code #include <uart.h> @endcode
*
* @brief Interrupt UART library using the built-in UART with transmit and receive circular buffers.
*
* This library can be used to transmit and receive data through the built in UART.
*
* An interrupt is generated when the UART has finished transmitting or
* receiving a byte. The interrupt handling routines use circular buffers
* for buffering received and transmitted data.
*
* The UART_RX_BUFFER_SIZE and UART_TX_BUFFER_SIZE constants define
* the size of the circular buffers in bytes. Note that these constants must be a power of 2.
* You may need to adapt these constants to your target and your application by adding
* CDEFS += -DUART_RX_BUFFER_SIZE=nn -DUART_TX_BUFFER_SIZE=nn to your Makefile.
*
* @note Based on Atmel Application Note AVR306
* @author Peter Fleury pfleury@gmx.ch http://tinyurl.com/peterfleury
* @copyright (C) 2015 Peter Fleury, GNU General Public License Version 3
*/
#include <avr/pgmspace.h>
#if (__GNUC__ * 100 + __GNUC_MINOR__) < 405
#error "This library requires AVR-GCC 4.5 or later, update to newer AVR-GCC compiler !"
#endif
/**@{*/
/*
** constants and macros
*/
/** @brief UART Baudrate Expression
* @param xtalCpu system clock in Mhz, e.g. 4000000UL for 4Mhz
* @param baudRate baudrate in bps, e.g. 1200, 2400, 9600
*/
#define UART_BAUD_SELECT(baudRate, xtalCpu) (((xtalCpu) + 8UL * (baudRate)) / (16UL * (baudRate)) - 1UL)
/** @brief UART Baudrate Expression for ATmega double speed mode
* @param xtalCpu system clock in Mhz, e.g. 4000000UL for 4Mhz
* @param baudRate baudrate in bps, e.g. 1200, 2400, 9600
*/
#define UART_BAUD_SELECT_DOUBLE_SPEED(baudRate, xtalCpu) \
(((((xtalCpu) + 4UL * (baudRate)) / (8UL * (baudRate)) - 1UL)) | 0x8000)
/** @brief Size of the circular receive buffer, must be power of 2
*
* You may need to adapt this constant to your target and your application by adding
* CDEFS += -DUART_RX_BUFFER_SIZE=nn to your Makefile.
*/
#ifndef UART_RX_BUFFER_SIZE
#define UART_RX_BUFFER_SIZE 32
#endif
/** @brief Size of the circular transmit buffer, must be power of 2
*
* You may need to adapt this constant to your target and your application by adding
* CDEFS += -DUART_TX_BUFFER_SIZE=nn to your Makefile.
*/
#ifndef UART_TX_BUFFER_SIZE
#define UART_TX_BUFFER_SIZE 32
#endif
/* test if the size of the circular buffers fits into SRAM */
#if ((UART_RX_BUFFER_SIZE + UART_TX_BUFFER_SIZE) >= (RAMEND - 0x60))
#error "size of UART_RX_BUFFER_SIZE + UART_TX_BUFFER_SIZE larger than size of SRAM"
#endif
/*
** high byte error return code of uart_getc()
*/
#define UART_FRAME_ERROR 0x1000 /**< @brief Framing Error by UART */
#define UART_OVERRUN_ERROR 0x0800 /**< @brief Overrun condition by UART */
#define UART_PARITY_ERROR 0x0400 /**< @brief Parity Error by UART */
#define UART_BUFFER_OVERFLOW 0x0200 /**< @brief receive ringbuffer overflow */
#define UART_NO_DATA 0x0100 /**< @brief no receive data available */
/*
** function prototypes
*/
/**
@brief Initialize UART and set baudrate
@param baudrate Specify baudrate using macro UART_BAUD_SELECT()
@return none
*/
extern void uart_init(unsigned int baudrate);
/**
* @brief Get received byte from ringbuffer
*
* Returns in the lower byte the received character and in the
* higher byte the last receive error.
* UART_NO_DATA is returned when no data is available.
*
* @return lower byte: received byte from ringbuffer
* @return higher byte: last receive status
* - \b 0 successfully received data from UART
* - \b UART_NO_DATA
* <br>no receive data available
* - \b UART_BUFFER_OVERFLOW
* <br>Receive ringbuffer overflow.
* We are not reading the receive buffer fast enough,
* one or more received character have been dropped
* - \b UART_OVERRUN_ERROR
* <br>Overrun condition by UART.
* A character already present in the UART UDR register was
* not read by the interrupt handler before the next character arrived,
* one or more received characters have been dropped.
* - \b UART_FRAME_ERROR
* <br>Framing Error by UART
*/
extern unsigned int uart_getc(void);
/**
* @brief Put byte to ringbuffer for transmitting via UART
* @param data byte to be transmitted
* @return none
*/
extern void uart_putc(unsigned char data);
/**
* @brief Put string to ringbuffer for transmitting via UART
*
* The string is buffered by the uart library in a circular buffer
* and one character at a time is transmitted to the UART using interrupts.
* Blocks if it can not write the whole string into the circular buffer.
*
* @param s string to be transmitted
* @return none
*/
extern void uart_puts(const char *s);
/**
* @brief Put string from program memory to ringbuffer for transmitting via UART.
*
* The string is buffered by the uart library in a circular buffer
* and one character at a time is transmitted to the UART using interrupts.
* Blocks if it can not write the whole string into the circular buffer.
*
* @param s program memory string to be transmitted
* @return none
* @see uart_puts_P
*/
extern void uart_puts_p(const char *s);
/**
* @brief Macro to automatically put a string constant into program memory
*/
#define uart_puts_P(__s) uart_puts_p(PSTR(__s))
/** @brief Initialize USART1 (only available on selected ATmegas) @see uart_init */
extern void uart1_init(unsigned int baudrate);
/** @brief Get received byte of USART1 from ringbuffer. (only available on selected ATmega) @see uart_getc */
extern unsigned int uart1_getc(void);
/** @brief Put byte to ringbuffer for transmitting via USART1 (only available on selected ATmega) @see uart_putc */
extern void uart1_putc(unsigned char data);
/** @brief Put string to ringbuffer for transmitting via USART1 (only available on selected ATmega) @see uart_puts */
extern void uart1_puts(const char *s);
/** @brief Put string from program memory to ringbuffer for transmitting via USART1 (only available on selected ATmega)
* @see uart_puts_p */
extern void uart1_puts_p(const char *s);
/** @brief Macro to automatically put a string constant into program memory */
#define uart1_puts_P(__s) uart1_puts_p(PSTR(__s))
/**@}*/
#endif // UART_H

339
uart.hpp
View File

@@ -1,33 +1,59 @@
#pragma once
#include <limits>
#include <cstdint>
#include "config.hpp"
#include "hardware0.hpp"
#include "hardware1.hpp"
#include "software.hpp"
#include "../flash/flash.hpp"
#include "hardware0.hpp"
#include "hardware1.hpp"
#define FORCE_INLINE __attribute__((always_inline))
#include "../flash/flash.hpp"
#include "../util/util.hpp"
namespace uart {
namespace detail {
template <typename...>
struct always_false {
static constexpr auto value = false;
};
template <typename T, T Limit, std::size_t Base>
static constexpr std::size_t cntDigits()
{
T num = Limit;
std::size_t cnt = 0;
do {
num /= Base;
++cnt;
} while (num > 0);
return cnt;
}
template <typename T, std::size_t Base>
static constexpr std::size_t maxNumDigits()
{
constexpr T MinVal = std::numeric_limits<T>::min();
constexpr T MaxVal = std::numeric_limits<T>::max();
constexpr T MinDigits = cntDigits<T, MinVal, Base>();
constexpr T MaxDigits = cntDigits<T, MaxVal, Base>();
return (MinDigits < MaxDigits) ? MaxDigits : MinDigits;
}
} // namespace detail
template <class Driver>
class Uart {
public:
// Initialization is done upon construction
Uart()
{
Driver::init();
}
using data_t = typename Driver::data_t;
// Constructing a uart object does not initialize the driver to allow different specializations with the same
// back-end to exists at the same time
// Note that init must be called every time when switching specializations with the same back-end
Uart() = default;
// Moving and copying uart objects is not supported
Uart(const Uart &) = delete;
@@ -35,17 +61,23 @@ class Uart {
Uart &operator=(const Uart &) = delete;
Uart &operator=(Uart &&) = delete;
static void txByte(const typename Driver::data_t &byte)
// Before using the uart init must be called
static void init()
{
Driver::init();
}
static void txByte(const data_t &byte)
{
Driver::txByte(byte);
}
static bool rxByte(typename Driver::data_t &byte)
static bool rxByte(data_t &byte)
{
return Driver::rxByte(byte);
}
static bool peek(typename Driver::data_t &byte)
static bool peek(data_t &byte)
{
return Driver::peek(byte);
}
@@ -55,6 +87,11 @@ class Uart {
return Driver::peek();
}
static void flushTx()
{
Driver::flushTx();
}
static void txString(const char *str)
{
static_assert(Driver::DATA_BITS == DataBits::EIGHT, "Strings are only supported with 8 data bits");
@@ -73,6 +110,47 @@ class Uart {
txByte(ch);
}
template <typename T, std::size_t Base = 10, std::size_t Padding = 0, char PadChar = '0', bool LowerCase = true>
static void txNumber(const T &val)
{
static_assert(std::is_integral_v<T>, "Only supported on integral types");
static_assert(Base >= 2, "Numbers with base less than 2 make no sense");
static_assert(Base <= 16, "Numbers with base higher than 16 are not supported");
static_assert(Padding <= detail::maxNumDigits<T, Base>(), "Cannot pad more than maximum length of number");
constexpr char AlphaChar = (LowerCase) ? 'a' : 'A';
constexpr std::size_t NumDigits = detail::maxNumDigits<T, Base>();
T digits = val;
if (digits < 0) {
digits = -digits;
txByte('-');
}
data_t buffer[NumDigits];
data_t *bufEnd = buffer + NumDigits - 1;
do {
const data_t lastDigit = digits % Base;
*bufEnd-- = (lastDigit < 10) ? ('0' + lastDigit) : (AlphaChar + lastDigit - 10);
digits /= Base;
} while (digits > 0);
if (Padding > 0) {
std::size_t strLen = buffer + NumDigits - (bufEnd + 1);
if (Padding > strLen) {
for (std::size_t i = Padding; i > strLen && bufEnd >= buffer; --i) {
*bufEnd-- = PadChar;
}
}
}
for (data_t *buf = bufEnd + 1; buf < buffer + NumDigits; ++buf)
txByte(*buf);
}
//////////////////////////////////////////////////////////////////////////
// Output stream overloads
@@ -88,199 +166,224 @@ class Uart {
return *this;
}
template <typename... Ts>
Uart &operator<<(char)
Uart &operator<<(const char &val)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
txByte(val);
return *this;
}
Uart &operator<<(const signed char &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const unsigned char &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const short &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const unsigned short &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const int &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const unsigned int &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const long &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const unsigned long &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const long long &val)
{
txNumber(val);
return *this;
}
Uart &operator<<(const unsigned long long &val)
{
txNumber(val);
return *this;
}
template <typename... Ts>
Uart &operator<<(unsigned char)
Uart &operator<<(float) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator<<(short)
Uart &operator<<(double) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator<<(unsigned short)
Uart &operator<<(long double) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator<<(int)
Uart &operator<<(const bool &val)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
txString(val ? F("true") : F("false"));
return *this;
}
template <typename... Ts>
Uart &operator<<(unsigned int)
Uart &operator<<(const void *val)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(long)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(unsigned long)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(long long)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(unsigned long long)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(float)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(double)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(long double)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(bool)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
}
template <typename... Ts>
Uart &operator<<(const void *)
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
txString(F("0x"));
txNumber<std::uint16_t, 16, 4, '0', false>(reinterpret_cast<std::uint16_t>(val));
return *this;
}
//////////////////////////////////////////////////////////////////////////
// Input stream overloads
template <typename... Ts>
Uart &operator>>(char &)
Uart &operator>>(char &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(unsigned char &)
Uart &operator>>(unsigned char &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(short &)
Uart &operator>>(short &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(unsigned short &)
Uart &operator>>(unsigned short &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(int &)
Uart &operator>>(int &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(unsigned int &)
Uart &operator>>(unsigned int &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(long &)
Uart &operator>>(long &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(unsigned long &)
Uart &operator>>(unsigned long &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(long long &)
Uart &operator>>(long long &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(unsigned long long &)
Uart &operator>>(unsigned long long &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(float &)
Uart &operator>>(float &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator>>(double &)
Uart &operator>>(double &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator>>(long double &)
Uart &operator>>(long double &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not supported by hardware");
}
template <typename... Ts>
Uart &operator>>(bool &)
Uart &operator>>(bool &) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
template <typename... Ts>
Uart &operator>>(const void *&)
Uart &operator>>(const void *&) const
{
static_assert(detail::always_false<Ts...>::value, "Not implemented");
static_assert(util::always_false_v<Ts...>, "Not implemented");
}
private:
friend void ::USART0_RX_vect();
friend void ::USART0_UDRE_vect();
#ifdef HAS_UART1
friend void ::USART1_RX_vect();
friend void ::USART1_UDRE_vect();
#endif
[[gnu::always_inline]] static void rxIntHandler()
{
Driver::rxIntHandler();
}
[[gnu::always_inline]] static void dataRegEmptyIntHandler()
{
Driver::dataRegEmptyIntHandler();
}
};
template <typename cfg = Config<>>
using Uart0 = Uart<Hardware0<Mode::ASYNCHRONOUS, cfg>>;
using Uart0 = Uart<Hardware0<cfg, Driven::INTERRUPT, Mode::ASYNCHRONOUS>>;
#ifdef HAS_UART1
template <typename cfg = Config<>>
using Uart1 = Uart<Hardware1<Mode::ASYNCHRONOUS, cfg>>;
using Uart1 = Uart<Hardware1<cfg, Driven::INTERRUPT, Mode::ASYNCHRONOUS>>;
#endif
} // namespace uart
#undef FORCE_INLINE
#undef HAS_UART1

642
usart.cpp
View File

@@ -1,642 +0,0 @@
#include "usart.h"
//////////////////////////////////////////////////////////////////////////
USART0 USART0::sm_cInstance;
//////////////////////////////////////////////////////////////////////////
USART0::USART0()
{
#ifdef USART_SHAREDIO
m_vui8pUCSRA = &UCSRA;
m_vui8pUCSRB = &UCSRB;
m_vui8pUCSRC = &UCSRC;
m_vui8pUBRRH = &UBRRH;
m_vui8pUBRRL = &UBRRL;
m_vui8pUDR = &UDR;
#endif
#ifndef USART_SHAREDIO
m_vui8pUCSRA = &UCSR0A;
m_vui8pUCSRB = &UCSR0B;
m_vui8pUCSRC = &UCSR0C;
m_vui8pUBRRH = &UBRR0H;
m_vui8pUBRRL = &UBRR0L;
m_vui8pUDR = &UDR0;
#endif
m_vsizeRXBufferHead = 0;
m_vsizeRXBufferTail = 0;
m_vsizeTXBufferHead = 0;
m_vsizeTXBufferTail = 0;
}
//////////////////////////////////////////////////////////////////////////
uint8_t USART0::readUCSRC()
{
uint8_t ui8UCSRC;
#ifdef USART_SHAREDIO
ui8UCSRC = UBRRH;
ui8UCSRC = UCSRC;
#else
ui8UCSRC = *m_vui8pUCSRC;
#endif
return ui8UCSRC;
}
//////////////////////////////////////////////////////////////////////////
void USART0::setUCSRC( uint8_t ui8UCSRC )
{
#ifdef USART_SHAREDIO
*m_vui8pUCSRC = ( 1 << URSEL ) | ui8UCSRC;
#else
*m_vui8pUCSRC = ui8UCSRC;
#endif
}
//////////////////////////////////////////////////////////////////////////
void USART0::setRXState( bool bEnable )
{
if( bEnable )
{
*m_vui8pUCSRB |= ( 1 << RXEN_D );
}
else
{
*m_vui8pUCSRB &= ~( 1 << RXEN_D );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::setTXState( bool bEnable )
{
if( bEnable )
{
*m_vui8pUCSRB |= ( 1 << TXEN_D );
}
else
{
*m_vui8pUCSRB &= ~( 1 << TXEN_D );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::setRXInterrupt( bool bEnable )
{
if( bEnable )
{
*m_vui8pUCSRB |= ( 1 << RXCIE_D );
}
else
{
*m_vui8pUCSRB &= ~( 1 << RXCIE_D );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::setUDREInterrupt( bool bEnable )
{
if( bEnable )
{
*m_vui8pUCSRB |= ( 1 << UDRIE_D );
}
else
{
*m_vui8pUCSRB &= ~( 1 << UDRIE_D );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::setBaudRate( uint32_t ui32BaudRate )
{
uint16_t ui16UBRR = ( ( F_CPU / ( 16 * ui32BaudRate ) ) - 1 );
*m_vui8pUBRRH = static_cast<uint8_t>( ui16UBRR >> 8 );
*m_vui8pUBRRL = static_cast<uint8_t>( ui16UBRR );
}
//////////////////////////////////////////////////////////////////////////
void USART0::setDataBits( uint8_t ui8DataBits )
{
uint8_t ui8UCSRC = readUCSRC();
if( ui8DataBits < 5 )
{
ui8DataBits = 5;
}
else if( ui8DataBits > 9 )
{
ui8DataBits = 9;
}
if( ui8DataBits <= 8 )
{
bool bZeroBit = ( ui8DataBits - 5 ) & 1;
bool bOneBit = ( ( ui8DataBits - 5 ) >> 1 ) & 1;
if( bZeroBit )
{
ui8UCSRC |= ( 1 << UCSZ0_D );
}
else
{
ui8UCSRC &= ~( 1 << UCSZ0_D );
}
if( bOneBit )
{
ui8UCSRC |= ( 1 << UCSZ1_D );
}
else
{
ui8UCSRC &= ~( 1 << UCSZ1_D );
}
*m_vui8pUCSRB &= ~( 1 << UCSZ2_D );
}
else
{
ui8UCSRC |= ( 1 << UCSZ1_D ) | ( 1 << UCSZ0_D );
*m_vui8pUCSRB |= ( 1 << UCSZ2_D );
}
setUCSRC( ui8UCSRC );
}
//////////////////////////////////////////////////////////////////////////
void USART0::setParity( Parity enmParity )
{
uint8_t ui8UCSRC = readUCSRC();
if( enmParity == Parity::DISABLED )
{
ui8UCSRC &= ~( ( 1 << UPM1_D ) | ( 1 << UPM0_D ) );
}
else if( enmParity == Parity::ODD )
{
ui8UCSRC |= ( ( 1 << UPM1_D ) | ( 1 << UPM0_D ) );
}
else if( enmParity == Parity::EVEN )
{
ui8UCSRC &= ~( ( 1 << UPM0_D ) );
ui8UCSRC |= ( ( 1 << UPM1_D ) );
}
setUCSRC( ui8UCSRC );
}
//////////////////////////////////////////////////////////////////////////
void USART0::setStopBits( StopBit enmStopBits )
{
uint8_t ui8UCSRC = readUCSRC();
if( enmStopBits == StopBit::ONE )
{
ui8UCSRC &= ~( 1 << USBS_D );
}
else if( enmStopBits == StopBit::TWO )
{
ui8UCSRC |= ( 1 << USBS_D );
}
setUCSRC( ui8UCSRC );
}
//////////////////////////////////////////////////////////////////////////
void USART0::setMode( Mode enmMode )
{
uint8_t ui8UCSRC = readUCSRC();
#ifdef USART_SPI
if( enmMode == Mode::ASYNCHRONOUS )
{
ui8UCSRC &= ~( ( 1 << UMSEL1_D ) | ( 1 << UMSEL0_D ) );
}
else if( enmMode == Mode::SYNCHRONOUS )
{
ui8UCSRC &= ~( 1 << UMSEL1_D );
ui8UCSRC |= ( 1 << UMSEL0_D );
}
else if( enmMode == Mode::MASTERSPI )
{
ui8UCSRC |= ( ( 1 << UMSEL1_D ) | ( 1 << UMSEL0_D ) );
}
#else
if( enmMode == Mode::ASYNCHRONOUS )
{
ui8UCSRC &= ~( 1 << UMSEL_D );
}
else if( enmMode == Mode::SYNCHRONOUS )
{
ui8UCSRC |= ( 1 << UMSEL_D );
}
#endif
setUCSRC( ui8UCSRC );
}
//////////////////////////////////////////////////////////////////////////
uint32_t USART0::getBaudRate()
{
uint16_t ui16UBRR;
ui16UBRR = static_cast<uint16_t>( *m_vui8pUBRRH ) << 8;
ui16UBRR |= *m_vui8pUBRRL;
return F_CPU / ( static_cast<uint32_t>( 16 ) * ( ui16UBRR + 1 ) );
}
//////////////////////////////////////////////////////////////////////////
uint8_t USART0::getDataBits()
{
if( *m_vui8pUCSRB & ( 1 << UCSZ2_D ) )
{
return 9;
}
uint8_t ui8UCSRC = readUCSRC();
bool bZeroBit = ui8UCSRC & ( 1 << UCSZ0_D );
bool bOneBit = ui8UCSRC & ( 1 << UCSZ1_D );
return 5 + ( bOneBit << 1 | bZeroBit );
}
//////////////////////////////////////////////////////////////////////////
USART0::Parity USART0::getParity()
{
uint8_t ui8UCSRC = readUCSRC();
bool bZeroBit = ui8UCSRC & ( 1 << UPM0_D );
bool bOneBit = ui8UCSRC & ( 1 << UPM1_D );
if( bOneBit && !bZeroBit )
{
return Parity::EVEN;
}
if( bOneBit && bZeroBit )
{
return Parity::ODD;
}
return Parity::DISABLED;
}
//////////////////////////////////////////////////////////////////////////
USART0::StopBit USART0::getStopBits()
{
uint8_t ui8UCSRC = readUCSRC();
if( ui8UCSRC & ( 1 << USBS_D ) )
{
return StopBit::TWO;
}
return StopBit::ONE;
}
//////////////////////////////////////////////////////////////////////////
USART0::~USART0()
{
flushTransmit();
setBaudRate( 0 );
setRXState( false );
setTXState( false );
setRXInterrupt( false );
setUDREInterrupt( false );
}
//////////////////////////////////////////////////////////////////////////
USART0& USART0::inst()
{
return sm_cInstance;
}
//////////////////////////////////////////////////////////////////////////
void USART0::init( uint32_t ui32BaudRate /* = 9600 */, uint8_t ui8DataBits /* = 8 */, Parity enmParity /* = Parity::DISABLED */, StopBit enmStopBits /* = StopBit::ONE */, Mode enmMode /* = Mode::ASYNCHRONOUS */ )
{
setBaudRate( ui32BaudRate );
setDataBits( ui8DataBits );
setParity( enmParity );
setStopBits( enmStopBits );
setMode( enmMode );
setRXState( true );
setTXState( true );
setRXInterrupt( true );
setUDREInterrupt( false );
}
//////////////////////////////////////////////////////////////////////////
bool USART0::receiveByte( uint8_t &ui8Data )
{
if( m_vsizeRXBufferHead == m_vsizeRXBufferTail && !( SREG & ( 1 << SREG_I ) ) )
{
while( !( *m_vui8pUCSRA & ( 1 << RXC_D ) ) );
ui8Data = *m_vui8pUDR;
return true;
}
else if( m_vsizeRXBufferHead == m_vsizeRXBufferTail )
{
return false;
}
ui8Data = m_vui8aRXBuffer[m_vsizeRXBufferTail];
m_vsizeRXBufferTail = ( m_vsizeRXBufferTail + 1 ) % sm_sizeRXBUFFER_SIZE;
return true;
}
//////////////////////////////////////////////////////////////////////////
bool USART0::receiveByte( uint8_t &ui8Data, uint16_t ui16TimeoutMS )
{
uint16_t ui16DelayCounter = 0;
while( !receiveByte( ui8Data ) )
{
_delay_ms( 1 );
if( ui16DelayCounter++ > ui16TimeoutMS )
{
return false;
}
}
return true;
}
//////////////////////////////////////////////////////////////////////////
uint8_t USART0::receiveByteBlocked()
{
uint8_t ui8Received;
while( !receiveByte( ui8Received ) );
return ui8Received;
}
//////////////////////////////////////////////////////////////////////////
uint8_t USART0::receivePeek()
{
uint8_t ui8Received;
if( !( SREG & ( 1 << SREG_I ) && m_vsizeRXBufferHead == m_vsizeRXBufferTail ) )
{
while( !( *m_vui8pUCSRA & ( 1 << RXC_D ) ) );
ui8Received = *m_vui8pUDR;
size_t sizeIndex = ( m_vsizeRXBufferHead + 1 ) % sm_sizeRXBUFFER_SIZE;
if( sizeIndex != m_vsizeRXBufferTail )
{
m_vui8aRXBuffer[m_vsizeRXBufferHead] = ui8Received;
m_vsizeRXBufferHead = sizeIndex;
}
return ui8Received;
}
while( m_vsizeRXBufferHead == m_vsizeRXBufferTail );
return m_vui8aRXBuffer[m_vsizeRXBufferTail];
}
//////////////////////////////////////////////////////////////////////////
bool USART0::receiveLine( char *szBuffer, size_t sizeBufferLength, const char *szLineTerminator /* = "\r\n" */ )
{
size_t sizeReceived = 0;
while( sizeReceived < sizeBufferLength - 1 )
{
uint8_t ui8ReceiveByte;
while( !receiveByte( ui8ReceiveByte ) );
szBuffer[sizeReceived++] = ui8ReceiveByte;
szBuffer[sizeReceived] = '\0';
if( strstr( szBuffer, szLineTerminator ) )
{
szBuffer[sizeReceived - strlen( szLineTerminator )] = '\0';
return true;
}
}
return false;
}
//////////////////////////////////////////////////////////////////////////
bool USART0::receiveLine( char *szBuffer, size_t sizeBufferLength, uint16_t ui16TimeoutMS, const char *szLineTerminator /* = "\r\n" */ )
{
size_t sizeReceived = 0;
while( sizeReceived < sizeBufferLength - 1 )
{
uint8_t ui8ReceiveByte;
uint16_t ui16DelayCounter = 0;
while( !receiveByte( ui8ReceiveByte ) )
{
_delay_ms( 1 );
if( ui16DelayCounter++ > ui16TimeoutMS )
{
szBuffer[sizeReceived] = '\0';
return false;
}
}
szBuffer[sizeReceived++] = ui8ReceiveByte;
szBuffer[sizeReceived] = '\0';
if( strstr( szBuffer, szLineTerminator ) )
{
szBuffer[sizeReceived - strlen( szLineTerminator )] = '\0';
return true;
}
}
return false;
}
//////////////////////////////////////////////////////////////////////////
void USART0::flushReceive()
{
uint32_t ui32BaudRate = getBaudRate();
uint8_t ui8BitsPerSymbol = 1;
ui8BitsPerSymbol += getDataBits();
if( getParity() != Parity::DISABLED )
{
ui8BitsPerSymbol += 1;
}
if( getStopBits() == StopBit::ONE )
{
ui8BitsPerSymbol += 1;
}
else
{
ui8BitsPerSymbol += 2;
}
uint16_t ui16BaudDelayMS = static_cast<uint16_t>( ( 1000.0 * ui8BitsPerSymbol ) / ui32BaudRate ) + 1;
uint8_t ui8Received;
if( !( SREG & ( 1 << SREG_I ) ) )
{
while( true )
{
for( uint16_t i = 0; i < ui16BaudDelayMS; ++i )
{
_delay_ms( 1 );
}
if( m_vsizeRXBufferHead != m_vsizeRXBufferTail )
{
receiveByte( ui8Received );
continue;
}
if( ( *m_vui8pUCSRA & ( 1 << RXC_D ) ) )
{
ui8Received = *m_vui8pUDR;
continue;
}
break;
}
}
else
{
while( receiveByte( ui8Received, ui16BaudDelayMS ) );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::transmitByte( uint8_t ui8Data )
{
if( m_vsizeTXBufferHead == m_vsizeTXBufferTail && *m_vui8pUCSRA & ( 1 << UDRE_D ) )
{
*m_vui8pUDR = ui8Data;
return;
}
size_t sizeIndex = ( m_vsizeTXBufferHead + 1 ) % sm_sizeTXBUFFER_SIZE;
while( sizeIndex == m_vsizeTXBufferTail )
{
if( !( SREG & ( 1 << SREG_I ) ) && *m_vui8pUCSRA & ( 1 << UDRE_D ) )
{
transmitInterruptHandler();
}
}
m_vui8aTXBuffer[m_vsizeTXBufferHead] = ui8Data;
m_vsizeTXBufferHead = sizeIndex;
if( !( SREG & ( 1 << SREG_I ) ) )
{
while( !( *m_vui8pUCSRA & ( 1 << UDRE_D ) ) );
transmitInterruptHandler();
}
else
{
setUDREInterrupt( true );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::transmitString( const char *szString )
{
while( *szString )
{
transmitByte( *szString++ );
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::flushTransmit()
{
while( m_vsizeTXBufferHead != m_vsizeTXBufferTail && !( *m_vui8pUCSRA & ( 1 << UDRE_D ) ) );
}
//////////////////////////////////////////////////////////////////////////
void USART0::receiveInterruptHandler()
{
uint8_t ui8ReceivedByte = *m_vui8pUDR;
size_t sizeIndex = ( m_vsizeRXBufferHead + 1 ) % sm_sizeRXBUFFER_SIZE;
if( sizeIndex != m_vsizeRXBufferTail )
{
m_vui8aRXBuffer[m_vsizeRXBufferHead] = ui8ReceivedByte;
m_vsizeRXBufferHead = sizeIndex;
}
}
//////////////////////////////////////////////////////////////////////////
void USART0::transmitInterruptHandler()
{
uint8_t ui8TransmitByte = m_vui8aTXBuffer[m_vsizeTXBufferTail];
m_vsizeTXBufferTail = ( m_vsizeTXBufferTail + 1 ) % sm_sizeTXBUFFER_SIZE;
*m_vui8pUDR = ui8TransmitByte;
if( m_vsizeTXBufferHead == m_vsizeTXBufferTail )
{
setUDREInterrupt( false );
}
}
//////////////////////////////////////////////////////////////////////////
ISR( USART0_RX_vect_D )
{
USART0::inst().receiveInterruptHandler();
}
//////////////////////////////////////////////////////////////////////////
ISR( USART0_UDRE_vect_D )
{
USART0::inst().transmitInterruptHandler();
}
/************************************************************************/
/************************************************************************/
#ifdef SECOND_USART
//////////////////////////////////////////////////////////////////////////
USART1 USART1::sm_cInstance;
//////////////////////////////////////////////////////////////////////////
USART1& USART1::inst()
{
return sm_cInstance;
}
//////////////////////////////////////////////////////////////////////////
USART1::USART1()
{
m_vui8pUCSRA = &UCSR1A;
m_vui8pUCSRB = &UCSR1B;
m_vui8pUCSRC = &UCSR1C;
m_vui8pUBRRH = &UBRR1H;
m_vui8pUBRRL = &UBRR1L;
m_vui8pUDR = &UDR1;
}
//////////////////////////////////////////////////////////////////////////
ISR( USART1_RX_vect_D )
{
USART1::inst().receiveInterruptHandler();
}
//////////////////////////////////////////////////////////////////////////
ISR( USART1_UDRE_vect_D )
{
USART1::inst().transmitInterruptHandler();
}
#endif

185
usart.h
View File

@@ -1,185 +0,0 @@
/*
* Copyright (c) by BlackMark 2015-2018
* Date 12/04/2018
* Version 3.4
*/
#ifndef USART_H
#define USART_H
#include <avr/io.h>
#include <avr/interrupt.h>
#include <stdint.h>
#include <string.h>
#include "../clock.h"
#if defined (__AVR_ATmega168A__) || defined (__AVR_ATmega328P__) || defined (__AVR_ATmega644P__)
#define USART_SPI
#define USART0_RX_vect_D USART_RX_vect
#define USART0_UDRE_vect_D USART_UDRE_vect
#endif
#if defined (__AVR_ATmega32A__) || (__AVR_ATmega8__) || (__AVR_ATmega8A__)
#define USART_SHAREDIO
#define USART0_RX_vect_D USART_RXC_vect
#define USART0_UDRE_vect_D USART_UDRE_vect
#endif
#if defined (__AVR_ATmega1284P__)
#define USART_SPI
#define SECOND_USART
#define USART0_RX_vect_D USART0_RX_vect
#define USART1_RX_vect_D USART1_RX_vect
#define USART0_UDRE_vect_D USART0_UDRE_vect
#define USART1_UDRE_vect_D USART1_UDRE_vect
#endif
#ifdef USART_SHAREDIO
#define RXEN_D RXEN
#define TXEN_D TXEN
#define RXCIE_D RXCIE
#define UDRIE_D UDRIE
#define UCSZ0_D UCSZ0
#define UCSZ1_D UCSZ1
#define UCSZ2_D UCSZ2
#define UPM0_D UPM0
#define UPM1_D UPM1
#define USBS_D USBS
#define RXC_D RXC
#define UDRE_D UDRE
#else
#define RXEN_D RXEN0
#define TXEN_D TXEN0
#define RXCIE_D RXCIE0
#define UDRIE_D UDRIE0
#define UCSZ0_D UCSZ00
#define UCSZ1_D UCSZ01
#define UCSZ2_D UCSZ02
#define UPM0_D UPM00
#define UPM1_D UPM01
#define USBS_D USBS0
#define RXC_D RXC0
#define UDRE_D UDRE0
#endif
#ifdef USART_SPI
#define UMSEL0_D UMSEL00
#define UMSEL1_D UMSEL01
#else
#define UMSEL_D UMSEL
#endif
class USART0
{
public:
enum class Mode
{
ASYNCHRONOUS = 0,
SYNCHRONOUS = 1,
#ifdef USART_SPI
MASTERSPI = 2
#endif
};
enum class Parity
{
DISABLED = 0,
ODD = 1,
EVEN = 2
};
enum class StopBit
{
ONE = 1,
TWO = 2
};
static constexpr size_t sm_sizeRXBUFFER_SIZE = 16;
static constexpr size_t sm_sizeTXBUFFER_SIZE = 16;
protected:
volatile uint8_t *m_vui8pUCSRA;
volatile uint8_t *m_vui8pUCSRB;
volatile uint8_t *m_vui8pUCSRC;
volatile uint8_t *m_vui8pUBRRH;
volatile uint8_t *m_vui8pUBRRL;
volatile uint8_t *m_vui8pUDR;
volatile size_t m_vsizeRXBufferHead;
volatile size_t m_vsizeRXBufferTail;
volatile size_t m_vsizeTXBufferHead;
volatile size_t m_vsizeTXBufferTail;
volatile uint8_t m_vui8aRXBuffer[sm_sizeRXBUFFER_SIZE];
volatile uint8_t m_vui8aTXBuffer[sm_sizeTXBUFFER_SIZE];
USART0();
private:
static USART0 sm_cInstance;
uint8_t readUCSRC();
void setUCSRC( uint8_t ui8UCSRC );
void setRXState( bool bEnable );
void setTXState( bool bEnable );
void setRXInterrupt( bool bEnable );
void setUDREInterrupt( bool bEnable );
void setBaudRate( uint32_t ui32BaudRate );
void setDataBits( uint8_t ui8DataBits );
void setParity( Parity enmParity );
void setStopBits( StopBit enmStopBits );
void setMode( Mode enmMode );
uint32_t getBaudRate();
uint8_t getDataBits();
Parity getParity();
StopBit getStopBits();
public:
~USART0();
static USART0& inst();
USART0( const USART0& ) = delete;
void operator=( const USART0& ) = delete;
void init( uint32_t ui32BaudRate = 9600, uint8_t ui8DataBits = 8, Parity enmParity = Parity::DISABLED, StopBit enmStopBits = StopBit::ONE, Mode enmMode = Mode::ASYNCHRONOUS );
bool receiveByte( uint8_t &ui8Data );
bool receiveByte( uint8_t &ui8Data, uint16_t ui16TimeoutMS );
uint8_t receiveByteBlocked();
uint8_t receivePeek();
bool receiveLine( char *szBuffer, size_t sizeBufferLength, const char *szLineTerminator = "\r\n" );
bool receiveLine( char *szBuffer, size_t sizeBufferLength, uint16_t ui16TimeoutMS, const char *szLineTerminator = "\r\n" );
void flushReceive();
void transmitByte( uint8_t ui8Data );
void transmitString( const char *szString );
void flushTransmit();
void receiveInterruptHandler();
void transmitInterruptHandler();
inline USART0& operator<<( const char *szString )
{
transmitString( szString );
return *this;
}
};
#ifdef SECOND_USART
class USART1 : public USART0
{
public:
static USART1& inst();
USART1( const USART1& ) = delete;
void operator=( const USART1& ) = delete;
private:
static USART1 sm_cInstance;
USART1();
};
#endif
#endif