2020-04-13 16:43:04 +02:00
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#pragma once
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2019-07-27 18:55:17 +02:00
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2022-05-29 16:15:11 +02:00
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#include <cstdint>
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2019-08-02 20:23:54 +02:00
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2019-08-05 17:59:33 +02:00
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#include <avr/interrupt.h>
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2019-08-02 20:23:54 +02:00
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#include <avr/io.h>
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2019-08-10 14:12:10 +02:00
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#include <avr/sfr_defs.h>
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2019-08-02 20:23:54 +02:00
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2019-07-28 12:15:19 +02:00
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#include "config.hpp"
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2019-08-02 09:21:47 +02:00
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#include "hardware.hpp"
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2019-07-27 18:55:17 +02:00
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namespace uart {
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2019-07-28 17:32:51 +02:00
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namespace detail {
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2019-08-14 18:58:21 +02:00
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#if defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega328P__)
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2019-07-30 20:29:38 +02:00
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2019-08-10 14:12:10 +02:00
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/*
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2019-08-15 18:49:29 +02:00
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The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's:
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2019-08-10 14:12:10 +02:00
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constexpr auto *foo = ptr;
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2019-08-15 18:49:29 +02:00
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Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site.
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The _SFR_ADDR macro in sfr_defs.h would give the address, but it does that by taking the address of the dereferenced
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pointer and casts it to uint16_t, which is still not a legal constexpr.
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The workaround therefore is to disable the pointer cast and dereference macro _MMIO_BYTE temporarily.
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2019-08-10 14:12:10 +02:00
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*/
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2019-08-15 18:49:29 +02:00
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#pragma push_macro("_MMIO_BYTE")
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#undef _MMIO_BYTE
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#define _MMIO_BYTE
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2019-07-30 20:29:38 +02:00
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struct Registers0 {
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2022-05-29 16:15:11 +02:00
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static constexpr std::uintptr_t IO_REG_ADDR = UDR0;
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static constexpr std::uintptr_t CTRL_STAT_REG_A_ADDR = UCSR0A;
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static constexpr std::uintptr_t CTRL_STAT_REG_B_ADDR = UCSR0B;
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static constexpr std::uintptr_t CTRL_STAT_REG_C_ADDR = UCSR0C;
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static constexpr std::uintptr_t BAUD_REG_L_ADDR = UBRR0L;
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static constexpr std::uintptr_t BAUD_REG_H_ADDR = UBRR0H;
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2019-07-28 17:32:51 +02:00
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};
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2019-08-15 18:49:29 +02:00
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#pragma pop_macro("_MMIO_BYTE")
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2019-07-30 21:43:52 +02:00
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enum class ControlFlagsA0 {
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2019-07-30 20:56:16 +02:00
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MULTI_PROC_COMM_MODE = MPCM0,
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SPEED_2X = U2X0,
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PARITY_ERROR = UPE0,
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DATA_OVER_RUN = DOR0,
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FRAME_ERROR = FE0,
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DATA_REG_EMPTY = UDRE0,
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TRANSMIT_COMPLETE = TXC0,
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RECEIVE_COMPLETE = RXC0,
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};
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2019-07-30 21:43:52 +02:00
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enum class ControlFlagsB0 {
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TX_DATA_BIT_8 = TXB80,
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RX_DATA_BIT_8 = RXB80,
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CHAR_SIZE_2 = UCSZ02,
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TX_ENABLE = TXEN0,
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RX_ENABLE = RXEN0,
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DATA_REG_EMPTY_INT_ENABLE = UDRIE0,
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TX_INT_ENABLE = TXCIE0,
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RX_INT_ENABLE = RXCIE0,
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};
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2019-07-30 21:43:52 +02:00
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enum class ControlFlagsC0 {
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CLK_POLARITY = UCPOL0,
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CHAR_SIZE_0 = UCSZ00,
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CHAR_SIZE_1 = UCSZ01,
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STOP_BIT_SEL = USBS0,
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PARITY_MODE_0 = UPM00,
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PARITY_MODE_1 = UPM01,
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MODE_SEL_0 = UMSEL00,
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MODE_SEL_1 = UMSEL01,
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};
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2019-07-30 21:51:13 +02:00
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// clang-format off
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constexpr int operator<<(const int &lhs, const ControlFlagsA0 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsB0 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsC0 &rhs) { return lhs << static_cast<int>(rhs); }
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// clang-format on
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2019-07-30 20:29:38 +02:00
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2020-04-13 16:43:04 +02:00
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#if defined(__AVR_ATmega328P__)
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#define USART0_RX_vect USART_RX_vect
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#define USART0_UDRE_vect USART_UDRE_vect
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#endif
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2019-08-02 15:46:07 +02:00
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2019-07-30 20:29:38 +02:00
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#else
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#error "This chip is not supported"
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#endif
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2019-07-30 21:43:52 +02:00
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} // namespace detail
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2019-08-05 20:05:59 +02:00
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template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
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2019-08-14 19:49:42 +02:00
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class Hardware0 : public detail::BlockingHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode> {
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};
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2019-08-02 18:20:06 +02:00
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2019-08-14 19:49:42 +02:00
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template <class cfg, Mode mode>
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class Hardware0<cfg, Driven::INTERRUPT, mode>
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: public detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode> {
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2019-08-02 12:08:16 +02:00
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public:
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2022-05-29 16:15:11 +02:00
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[[gnu::always_inline]] static void init()
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2019-08-02 12:08:16 +02:00
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{
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HardwareImpl::init();
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2019-08-05 17:59:33 +02:00
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sei();
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2019-08-02 12:08:16 +02:00
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}
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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private:
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using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, Driven::INTERRUPT, mode>;
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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using InterruptHardwareImpl = detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0,
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detail::ControlFlagsB0, detail::ControlFlagsC0, cfg, mode>;
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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// Must be friends with Uart interface to call these private handlers
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template <class Driver>
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friend class Uart;
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2019-08-15 18:07:11 +02:00
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2022-05-29 16:15:11 +02:00
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[[gnu::always_inline]] static void rxIntHandler()
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2020-04-13 16:43:04 +02:00
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{
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InterruptHardwareImpl::rxIntHandler();
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}
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2019-08-15 18:07:11 +02:00
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2022-05-29 16:15:11 +02:00
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[[gnu::always_inline]] static void dataRegEmptyIntHandler()
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2020-04-13 16:43:04 +02:00
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{
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InterruptHardwareImpl::dataRegEmptyIntHandler();
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}
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};
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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} // namespace uart
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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//////////////////////////////////////////////////////////////////////////
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2019-08-15 18:07:11 +02:00
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2020-04-13 16:43:04 +02:00
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// Forward declare interrupt functions to allow adding them as friends
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extern "C" {
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void USART0_RX_vect() __attribute__((signal));
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void USART0_UDRE_vect() __attribute__((signal));
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2019-08-15 18:07:11 +02:00
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}
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2020-04-13 16:43:04 +02:00
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// clang-format off
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#define REGISTER_UART0_INT_VECTORS(uart_type) \
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ISR(USART0_RX_vect) \
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{ \
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uart_type::rxIntHandler(); \
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} \
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ISR(USART0_UDRE_vect) \
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{ \
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uart_type::dataRegEmptyIntHandler(); \
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} \
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struct _##uart_type {}
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// clang-format on
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