79 lines
3.5 KiB
CMake
79 lines
3.5 KiB
CMake
cmake_minimum_required(VERSION 3.28)
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project(tsb_libavr LANGUAGES CXX)
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# libavr from a local checkout (LIBAVR_ROOT) or the forge; the toolchain file
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# comes from the same checkout via CMakePresets.json.
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include(FetchContent)
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if(NOT LIBAVR_ROOT AND DEFINED ENV{LIBAVR_ROOT})
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set(LIBAVR_ROOT $ENV{LIBAVR_ROOT})
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endif()
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if(LIBAVR_ROOT)
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FetchContent_Declare(libavr SOURCE_DIR ${LIBAVR_ROOT})
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else()
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FetchContent_Declare(libavr GIT_REPOSITORY git@git.blackmark.me:avr/libavr.git GIT_TAG main)
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endif()
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FetchContent_MakeAvailable(libavr)
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if(PROJECT_IS_TOP_LEVEL)
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add_compile_options(-Werror) # warnings are errors for the port's own code
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enable_testing()
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# The behavioral test drives the real TinySafeBoot wire protocol over a
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# simavr pty (as the host tools do) and actually flashes the device. The
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# runner is a host program built at configure time against libsimavr; if it
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# or Python is missing, only the size tests run.
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find_program(_host_cc NAMES cc gcc)
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find_package(Python3 COMPONENTS Interpreter)
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if(_host_cc AND Python3_FOUND)
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set(TSB_DEVICE ${CMAKE_BINARY_DIR}/tsb_device)
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execute_process(
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COMMAND ${_host_cc} -O2 -I/usr/include/simavr -I/usr/include/simavr/parts
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-o ${TSB_DEVICE} ${CMAKE_CURRENT_SOURCE_DIR}/test/device.c
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-lsimavr -lsimavrparts -lelf
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RESULT_VARIABLE _dev_res ERROR_VARIABLE _dev_err)
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if(NOT _dev_res EQUAL 0)
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message(STATUS "tsb_device not built (${_dev_err}) — protocol tests skipped")
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unset(TSB_DEVICE)
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endif()
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endif()
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endif()
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# The TinySafeBoot protocol reimplemented on libavr in three variants that trade
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# clarity for size. Each links into the ATmega328P boot section (BOOTSZ selects
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# its size; BOOTRST vectors a reset to its base) with -nostartfiles — a polled
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# loader has no use for the crt or the vector table. The naked entry sits in
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# .vectors, laid first, and runs. The boot base is FLASHEND+1 minus the section
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# size; the linker section-start and the source's boot_bytes agree.
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# All three implement the full oracle feature set (see oracle/README.md):
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# watchdog bail, one-wire half-duplex, config-page activation timeout, password
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# gate, emergency erase, config/flash/EEPROM read-write. They differ only in how.
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# tsb_asm — minimal inline asm, the headline: 502 B in the 512 B section,
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# matching the hand-written oracle's size and features.
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# tsb_tricks — compiler trickery, no asm: 808 B in the 1 KB section (BOOTSZ=10).
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# tsb_pure — pure idiomatic libavr: 950 B in the 1 KB section.
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#
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# add_tsb_variant(<name> <boot-section-bytes>)
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function(add_tsb_variant name bytes)
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math(EXPR base_dec "32768 - ${bytes}")
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math(EXPR base_hex "${base_dec}" OUTPUT_FORMAT HEXADECIMAL)
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add_executable(${name} tsb/${name}.cpp)
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target_link_libraries(${name} PRIVATE libavr)
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target_link_options(${name} PRIVATE -nostartfiles -Wl,--section-start=.text=${base_hex})
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add_custom_command(TARGET ${name} POST_BUILD COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${name}>)
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if(PROJECT_IS_TOP_LEVEL)
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add_test(NAME ${name}.size
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COMMAND ${CMAKE_COMMAND} -DSIZE_TOOL=${CMAKE_SIZE} -DELF=$<TARGET_FILE:${name}>
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-DLIMIT=${bytes} -P ${CMAKE_CURRENT_SOURCE_DIR}/test/check_size.cmake)
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if(DEFINED TSB_DEVICE)
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add_test(NAME ${name}.protocol
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COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/test/tsbtest.py
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${TSB_DEVICE} $<TARGET_FILE:${name}> ${base_hex})
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endif()
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endif()
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endfunction()
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add_tsb_variant(tsb_asm 512)
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add_tsb_variant(tsb_pure 1024)
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add_tsb_variant(tsb_tricks 1024)
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