yazoalfa/README.md

68 lines
3.2 KiB
Markdown
Raw Normal View History

2019-11-08 06:54:41 +01:00
# yazoalfa
2019-11-08 08:16:40 +01:00
Yet Another Zero Overhead Abstraction Library For AVR.
## Specification
This document will outline the capabilities of this library and what features will be implemented.
The library is grouped into modules that each implement a zero overhead template-based abstraction for the underlying hardware of the AVR chip.
### IO
The IO module provides an abstraction for configuring the mode of a pin, or port, or virtual port. It provides an easy way of writing to, or reading from the underlying hardware.
#### Virtual port
Sometimes it is not possible to use a hardware port, because some pins are needed for their alternative functions. In this case it would be very convenient to group arbitrary pins into a virtual port that can then be used just like a regular port.
This will obviously incur some overhead compared to a hardware port, but not more than manually setting each pin.
### ADC
The ADC module provides an easy way to configure the mode of operation and will check that only pins with ADC can be used.
### UART
2020-02-21 18:00:38 +01:00
The UART module provides a general interface for serial communication which is decoupled from the actual backend driver. The backend driver might be UART0 (or UART1 if available), or it might be a user provided software UART driver on chips (pins) that don't have hardware UART support.
2019-11-08 08:16:40 +01:00
The backend might also be interrupt driven and use some configurable receive/transmit buffer, or be blocking and not need any buffers. The buffers should only be allocated in interrupt driven mode and also be compile-time allocated.
### SPI
The SPI module, similar to UART, is decoupled from the backend. This allows a software backend to be used where no hardware SPI is supported.
### I2C
The I2C module is basically identical to SPI, just with a different protocol.
## Goals
- IO
2020-02-01 15:29:52 +01:00
- [x] Interface for io-pins
- [x] Interface for io-ports
2020-02-01 22:16:43 +01:00
- [x] Interface for mapping io-pins onto virtual io-ports, where the pins do not have to be located on the same hardware port
2020-02-01 22:18:47 +01:00
- [x] Provide an example showcasing the usage and possibilities
2019-11-08 08:16:40 +01:00
- ADC
2020-02-21 21:54:36 +01:00
- [x] Support common usage with easy extendability
- [x] Compile-time check for correct hardware configuration
- [x] Provide an example showcasing the usage and possibilities
2019-11-08 08:16:40 +01:00
- UART
2020-02-01 15:44:30 +01:00
- [x] Separation of interface and backend-driver
2020-02-21 17:50:36 +01:00
- [x] Support common usage with easy extendability
- [x] Compile-time check for correct hardware configuration
2020-02-01 15:44:30 +01:00
- [x] Blocking hardware backend
- [x] Interrupt driven hardware backend
2020-02-21 17:50:36 +01:00
- [x] Type-safe convenience functions for writing basic data types
- [x] Provide an example showcasing the usage and possibilities
2019-11-08 08:16:40 +01:00
- SPI
2020-02-21 17:41:32 +01:00
- [x] Separation of interface and backend-driver
- [x] Support all hardware provided configuration options
- [x] Compile-time check for correct hardware configuration
- [x] Provide an example showcasing the usage and possibilities
2019-11-08 08:16:40 +01:00
- I2C
2020-02-01 15:52:23 +01:00
- [x] Separation of interface and backend-driver
2020-02-21 16:33:40 +01:00
- [x] Support common usage with easy extendability
- [x] Compile-time check for correct hardware configuration
- [x] Provide an example showcasing the usage and possibilities
2019-11-08 08:16:40 +01:00
- General
2020-02-21 21:55:04 +01:00
- [x] Support for most common AVR chips (ATmega8, ATmega328, ATtiny85, ...)