Finished rough draft of the spec
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README.md
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README.md
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# yazoalfa
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Yet Another Zero Overhead Abstraction Library For AVR.
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Yet Another Zero Overhead Abstraction Library For AVR.
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## Specification
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This document will outline the capabilities of this library and what features will be implemented.
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The library is grouped into modules that each implement a zero overhead template-based abstraction for the underlying hardware of the AVR chip.
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### IO
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The IO module provides an abstraction for configuring the mode of a pin, or port, or virtual port. It provides an easy way of writing to, or reading from the underlying hardware.
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#### Virtual port
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Sometimes it is not possible to use a hardware port, because some pins are needed for their alternative functions. In this case it would be very convenient to group arbitrary pins into a virtual port that can then be used just like a regular port.
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This will obviously incur some overhead compared to a hardware port, but not more than manually setting each pin.
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### ADC
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The ADC module provides an easy way to configure the mode of operation and will check that only pins with ADC can be used.
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### UART
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The UART module provides a general interface for serial communication which is decoupled from the actual backend driver. The backend driver might be UART0 (or UART1 if available), or it might be a software UART driver on chips (pins) that don't have hardware UART support.
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The backend might also be interrupt driven and use some configurable receive/transmit buffer, or be blocking and not need any buffers. The buffers should only be allocated in interrupt driven mode and also be compile-time allocated.
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### SPI
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The SPI module, similar to UART, is decoupled from the backend. This allows a software backend to be used where no hardware SPI is supported.
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### I2C
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The I2C module is basically identical to SPI, just with a different protocol.
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### Timers
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The timers module allows the configuration of the hardware timers. Compile-time checks make sure that the requested time is actually achievable with the underlying hardware timer. The prescaler will be automatically calculated at compile-time based on the clock frequency, the hardware timer used and the time requested. The prescaler can also be specified directly.
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#### PWM
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The PWM mode of the hardware timer can also be used. Additionally, if PWM is needed on a pin that does not have hardware PWM support, a hardware timer can be used to implement software PWM.
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## Goals
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- IO
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- [ ] Interface for io-pins
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- [ ] Interface for io-ports
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- [ ] Interface for mapping io-pins onto virtual io-ports, where the pins do not have to be located on the same hardware port
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- ADC
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- [ ] Support all hardware provided configuration options
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- [ ] Compile-time check for correct hardware configuration
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- UART
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- [ ] Separation of interface and backend-driver
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- [ ] Support all hardware provided configuration options
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- [ ] Compile-time check for correct hardware configuration
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- [ ] Software backend driver
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- [ ] Blocking hardware backend
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- [ ] Interrupt driven hardware backend
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- [ ] Type-safe convenience functions for writing and reading basic data types
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- SPI
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- [ ] Separation of interface and backend-driver
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- [ ] Support all hardware provided configuration options
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- [ ] Compile-time check for correct hardware configuration
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- [ ] Software backend driver
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- I2C
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- [ ] Separation of interface and backend-driver
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- [ ] Support all hardware provided configuration options
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- [ ] Compile-time check for correct hardware configuration
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- [ ] Software backend driver
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- Timers
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- [ ] Support all hardware provided configuration options
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- PWM
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- [ ] Compile-time check for correct hardware configuration
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- [ ] Software PWM on pins that don't have hardware PWM support
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- General
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- [ ] Support for most common AVR chips (ATmega8, ATmega328, ATtiny85, ...)
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- [ ] Provide examples for each module showcasing the usage and possibilities
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