157 lines
4.5 KiB
C++
157 lines
4.5 KiB
C++
#pragma once
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#include <stdint.h>
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/sfr_defs.h>
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#include "config.hpp"
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#include "hardware.hpp"
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#define FORCE_INLINE __attribute__((always_inline))
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namespace uart {
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namespace detail {
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#if defined(__AVR_ATmega1284P__)
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/*
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The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's:
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constexpr auto *foo = ptr;
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Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site.
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The _SFR_ADDR macro in sfr_defs.h would give the address, but it does that by taking the address of the dereferenced
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pointer and casts it to uint16_t, which is still not a legal constexpr.
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The workaround therefore is to disable the pointer cast and dereference macro _MMIO_BYTE temporarily.
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*/
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#pragma push_macro("_MMIO_BYTE")
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#undef _MMIO_BYTE
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#define _MMIO_BYTE
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struct Registers1 {
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static constexpr uintptr_t IO_REG_ADDR = UDR1;
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static constexpr uintptr_t CTRL_STAT_REG_A_ADDR = UCSR1A;
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static constexpr uintptr_t CTRL_STAT_REG_B_ADDR = UCSR1B;
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static constexpr uintptr_t CTRL_STAT_REG_C_ADDR = UCSR1C;
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static constexpr uintptr_t BAUD_REG_L_ADDR = UBRR1L;
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static constexpr uintptr_t BAUD_REG_H_ADDR = UBRR1H;
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};
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#pragma pop_macro("_MMIO_BYTE")
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enum class ControlFlagsA1 {
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MULTI_PROC_COMM_MODE = MPCM1,
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SPEED_2X = U2X1,
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PARITY_ERROR = UPE1,
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DATA_OVER_RUN = DOR1,
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FRAME_ERROR = FE1,
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DATA_REG_EMPTY = UDRE1,
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TRANSMIT_COMPLETE = TXC1,
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RECEIVE_COMPLETE = RXC1,
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};
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enum class ControlFlagsB1 {
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TX_DATA_BIT_8 = TXB81,
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RX_DATA_BIT_8 = RXB81,
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CHAR_SIZE_2 = UCSZ12,
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TX_ENABLE = TXEN1,
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RX_ENABLE = RXEN1,
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DATA_REG_EMPTY_INT_ENABLE = UDRIE1,
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TX_INT_ENABLE = TXCIE1,
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RX_INT_ENABLE = RXCIE1,
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};
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enum class ControlFlagsC1 {
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CLK_POLARITY = UCPOL1,
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CHAR_SIZE_0 = UCSZ10,
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CHAR_SIZE_1 = UCSZ11,
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STOP_BIT_SEL = USBS1,
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PARITY_MODE_0 = UPM10,
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PARITY_MODE_1 = UPM11,
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MODE_SEL_0 = UMSEL10,
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MODE_SEL_1 = UMSEL11,
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};
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// clang-format off
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constexpr int operator<<(const int &lhs, const ControlFlagsA1 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsB1 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsC1 &rhs) { return lhs << static_cast<int>(rhs); }
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// clang-format on
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#define HAS_UART1
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#endif
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} // namespace detail
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#ifdef HAS_UART1
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template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
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class Hardware1 : public detail::BlockingHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
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detail::ControlFlagsC1, cfg, mode> {
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};
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template <class cfg, Mode mode>
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class Hardware1<cfg, Driven::INTERRUPT, mode>
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: public detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
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detail::ControlFlagsC1, cfg, mode> {
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public:
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static void init() FORCE_INLINE
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{
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HardwareImpl::init();
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sei();
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}
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private:
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using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
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detail::ControlFlagsC1, cfg, Driven::INTERRUPT, mode>;
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using InterruptHardwareImpl = detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1,
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detail::ControlFlagsB1, detail::ControlFlagsC1, cfg, mode>;
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// Must be friends with Uart interface to call these private handlers
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template <class Driver>
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friend class Uart;
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static void rxIntHandler() FORCE_INLINE
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{
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InterruptHardwareImpl::rxIntHandler();
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}
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static void dataRegEmptyIntHandler() FORCE_INLINE
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{
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InterruptHardwareImpl::dataRegEmptyIntHandler();
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}
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};
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} // namespace uart
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//////////////////////////////////////////////////////////////////////////
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// Forward declare interrupt functions to allow adding them as friends
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extern "C" {
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void USART1_RX_vect() __attribute__((signal));
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void USART1_UDRE_vect() __attribute__((signal));
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}
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// clang-format off
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#define REGISTER_UART1_INT_VECTORS(uart_type) \
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ISR(USART1_RX_vect) \
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{ \
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uart_type::rxIntHandler(); \
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} \
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ISR(USART1_UDRE_vect) \
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{ \
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uart_type::dataRegEmptyIntHandler(); \
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} \
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struct _##uart_type { \
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}
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// clang-format off
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#endif
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#undef FORCE_INLINE
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