Replaced maybe_unused with unnamed parameter

.gitignore

@@ -2,4 +2,10 @@
 Release
 Debug
 *.componentinfo.xml
-avrdude.bat
+*.elf
+*.o
+*.hex
+*.srec
+*.eeprom
+*.lss
+*.map

hardware.hpp

@@ -4,6 +4,8 @@
 
 #include <stdint.h>
 
+#include "utils.hpp"
+
 #define FORCE_INLINE __attribute__((always_inline))
 
 namespace uart {
@@ -23,6 +25,21 @@ enum class Driven {
 
 namespace detail {
 
+using reg_ptr_t = volatile uint8_t *;
+
+template <uintptr_t Address>
+static inline reg_ptr_t getRegPtr()
+{
+	return reinterpret_cast<reg_ptr_t>(Address);
+}
+
+template <typename data_t, uint8_t Size>
+struct RingBuffer {
+	uint8_t head;
+	uint8_t tail;
+	data_t buf[Size];
+};
+
 template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Driven driven,
           Mode mode>
 class Hardware {
@@ -31,8 +48,8 @@ class Hardware {
 	{
 		constexpr auto baudVal = calcBaud();
 
-		*Registers::BAUD_REG_H = static_cast<uint8_t>(baudVal >> 8);
+		*getRegPtr<Registers::BAUD_REG_H_ADDR>() = static_cast<uint8_t>(baudVal >> 8);
-		*Registers::BAUD_REG_L = static_cast<uint8_t>(baudVal);
+		*getRegPtr<Registers::BAUD_REG_L_ADDR>() = static_cast<uint8_t>(baudVal);
 
 		constexpr auto dataBitsVal = calcDataBits();
 		constexpr auto parityVal = calcParity();
@@ -45,14 +62,14 @@ class Hardware {
 		constexpr uint8_t controlRegB = dataBitsVal.regBVal | enableRx | enableTx | interruptVal;
 		constexpr uint8_t controlRegC = dataBitsVal.regCVal | parityVal | stopBitsVal | modeVal;
 
-		*Registers::CTRL_STAT_REG_B = controlRegB;
+		*getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>() = controlRegB;
-		*Registers::CTRL_STAT_REG_C = controlRegC;
+		*getRegPtr<Registers::CTRL_STAT_REG_C_ADDR>() = controlRegC;
 	}
 
 	static bool rxByteBlocking(typename cfg::data_t &byte) FORCE_INLINE
 	{
-		if (*Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
+		if (*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
-			byte = *Registers::IO_REG;
+			byte = *getRegPtr<Registers::IO_REG_ADDR>();
 			return true;
 		}
 
@@ -61,22 +78,22 @@ class Hardware {
 
 	static typename cfg::data_t rxByteInterrupt() FORCE_INLINE
 	{
-		return *Registers::IO_REG;
+		return *getRegPtr<Registers::IO_REG_ADDR>();
 	}
 
 	static bool txEmpty() FORCE_INLINE
 	{
-		return *Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::DATA_REG_EMPTY);
+		return *getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::DATA_REG_EMPTY);
 	}
 
 	static bool txComplete() FORCE_INLINE
 	{
-		return *Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
+		return *getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
 	}
 
 	static void clearTxComplete() FORCE_INLINE
 	{
-		*Registers::CTRL_STAT_REG_A |= (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
+		*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() |= (1 << CtrlFlagsA::TRANSMIT_COMPLETE);
 	}
 
 	static void txByteBlocking(const typename cfg::data_t &byte) FORCE_INLINE
@@ -84,17 +101,17 @@ class Hardware {
 		while (!txEmpty())
 			;
 
-		*Registers::IO_REG = byte;
+		*getRegPtr<Registers::IO_REG_ADDR>() = byte;
 	}
 
 	static void txByteInterrupt(volatile const typename cfg::data_t &byte) FORCE_INLINE
 	{
-		*Registers::IO_REG = byte;
+		*getRegPtr<Registers::IO_REG_ADDR>() = byte;
 	}
 
 	static bool peekBlocking() FORCE_INLINE
 	{
-		if (*Registers::CTRL_STAT_REG_A & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
+		if (*getRegPtr<Registers::CTRL_STAT_REG_A_ADDR>() & (1 << CtrlFlagsA::RECEIVE_COMPLETE)) {
 			return true;
 		}
 
@@ -103,12 +120,12 @@ class Hardware {
 
 	static void enableDataRegEmptyInt() FORCE_INLINE
 	{
-		*Registers::CTRL_STAT_REG_B |= (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
+		*getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>() |= (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
 	}
 
 	static void disableDataRegEmptyInt() FORCE_INLINE
 	{
-		*Registers::CTRL_STAT_REG_B &= ~(1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
+		*getRegPtr<Registers::CTRL_STAT_REG_B_ADDR>() &= ~(1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE);
 	}
 
   private:
@@ -212,19 +229,159 @@ class Hardware {
 		uint8_t interruptVal = 0;
 
 		if (driven == Driven::INTERRUPT)
-			interruptVal |= (1 << CtrlFlagsB::DATA_REG_EMPTY_INT_ENABLE) | (1 << CtrlFlagsB::RX_INT_ENABLE);
+			interruptVal = (1 << CtrlFlagsB::RX_INT_ENABLE);
 
 		return interruptVal;
 	}
 };
 
-template <typename data_t, uint8_t Size>
+template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
-struct RingBuffer {
+class BlockingHardware {
-	uint8_t head;
+  public:
-	uint8_t tail;
+	using data_t = typename cfg::data_t;
-	data_t buf[Size];
+	static constexpr auto DATA_BITS = cfg::DATA_BITS;
+
+	static void init() FORCE_INLINE
+	{
+		HardwareImpl::init();
+	}
+
+	static void txByte(const data_t &byte) FORCE_INLINE
+	{
+		HardwareImpl::txByteBlocking(byte);
+	}
+
+	static bool rxByte(data_t &byte) FORCE_INLINE
+	{
+		return HardwareImpl::rxByteBlocking(byte);
+	}
+
+	static bool peek(data_t &) FORCE_INLINE
+	{
+		static_assert(util::always_false_v<data_t>, "Peek with data is not supported in blocking mode");
+		return false;
+	}
+
+	static bool peek() FORCE_INLINE
+	{
+		return HardwareImpl::peekBlocking();
+	}
+
+	static void flushTx() FORCE_INLINE
+	{
+		while (!HardwareImpl::txEmpty())
+			;
+		while (!HardwareImpl::txComplete())
+			;
+		HardwareImpl::clearTxComplete();
+	}
+
+  private:
+	using HardwareImpl = Hardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, Driven::BLOCKING, mode>;
 };
 
+template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
+class InterruptHardware {
+  public:
+	using data_t = typename cfg::data_t;
+	static constexpr auto DATA_BITS = cfg::DATA_BITS;
+
+	static void txByte(const data_t &byte) FORCE_INLINE
+	{
+		uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
+		while (tmpHead == sm_txBuf.tail)
+			;
+
+		sm_txBuf.buf[tmpHead] = byte;
+		sm_txBuf.head = tmpHead;
+
+		HardwareImpl::enableDataRegEmptyInt();
+	}
+
+	static bool rxByte(data_t &byte) FORCE_INLINE
+	{
+		if (sm_rxBuf.head == sm_rxBuf.tail)
+			return false;
+
+		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
+		byte = sm_rxBuf.buf[tmpTail];
+		sm_rxBuf.tail = tmpTail;
+
+		return true;
+	}
+
+	static bool peek(data_t &byte) FORCE_INLINE
+	{
+		if (sm_rxBuf.head == sm_rxBuf.tail)
+			return false;
+
+		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
+		byte = sm_rxBuf.buf[tmpTail];
+
+		return true;
+	}
+
+	static bool peek() FORCE_INLINE
+	{
+		return (sm_rxBuf.head != sm_rxBuf.tail);
+	}
+
+	static void flushTx() FORCE_INLINE
+	{
+		while (sm_txBuf.head != sm_txBuf.tail)
+			;
+		while (!HardwareImpl::txEmpty())
+			;
+		while (!HardwareImpl::txComplete())
+			;
+		HardwareImpl::clearTxComplete();
+	}
+
+  protected:
+	static void rxIntHandler()
+	{
+		auto data = HardwareImpl::rxByteInterrupt();
+
+		uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
+
+		if (tmpHead != sm_rxBuf.tail) {
+			sm_rxBuf.head = tmpHead;
+			sm_rxBuf.buf[tmpHead] = data;
+		} else {
+			// TODO: Handle overflow
+		}
+	}
+
+	static void dataRegEmptyIntHandler() FORCE_INLINE
+	{
+		if (sm_txBuf.head != sm_txBuf.tail) {
+			uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
+			sm_txBuf.tail = tmpTail;
+			HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
+		} else
+			HardwareImpl::disableDataRegEmptyInt();
+	}
+
+  private:
+	using HardwareImpl = Hardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, Driven::INTERRUPT, mode>;
+
+	static constexpr auto TX_BUFFER_SIZE = 16;
+	static constexpr auto RX_BUFFER_SIZE = 16;
+
+	static volatile RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
+	static volatile RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
+};
+
+template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
+volatile RingBuffer<typename InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::data_t,
+                    InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::TX_BUFFER_SIZE>
+    InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::sm_txBuf = {0, 0, {0}};
+
+template <class Registers, typename CtrlFlagsA, typename CtrlFlagsB, typename CtrlFlagsC, class cfg, Mode mode>
+volatile RingBuffer<typename InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::data_t,
+                    InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::RX_BUFFER_SIZE>
+    InterruptHardware<Registers, CtrlFlagsA, CtrlFlagsB, CtrlFlagsC, cfg, mode>::sm_rxBuf = {0, 0, {0}};
+
 } // namespace detail
 
 } // namespace uart

hardware0.cpp

@@ -5,7 +5,12 @@
 namespace uart {
 namespace detail {
 
-#if defined(__AVR_ATmega1284P__)
+#if defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega328P__)
+
+#if defined(__AVR_ATmega328P__)
+#define USART0_RX_vect USART_RX_vect
+#define USART0_UDRE_vect USART_UDRE_vect
+#endif
 
 void (*fnRx0IntHandler)() = nullptr;
 void (*fnDataReg0EmptyIntHandler)() = nullptr;

hardware0.hpp

@@ -4,6 +4,7 @@
 
 #include <avr/interrupt.h>
 #include <avr/io.h>
+#include <avr/sfr_defs.h>
 
 #include "config.hpp"
 #include "hardware.hpp"
@@ -14,17 +15,31 @@ namespace uart {
 
 namespace detail {
 
-#if defined(__AVR_ATmega1284P__)
+#if defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega328P__)
+
+/*
+The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's
+  constexpr auto *foo = ptr;
+
+Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site
+For this to work we need to temporarily disable the _SFR_MEM8 macro so that the register macro just gives the address
+*/
+
+#undef _SFR_MEM8
+#define _SFR_MEM8
 
 struct Registers0 {
-	static constexpr volatile auto *IO_REG = &UDR0;
+	static constexpr uintptr_t IO_REG_ADDR = UDR0;
-	static constexpr volatile auto *CTRL_STAT_REG_A = &UCSR0A;
+	static constexpr uintptr_t CTRL_STAT_REG_A_ADDR = UCSR0A;
-	static constexpr volatile auto *CTRL_STAT_REG_B = &UCSR0B;
+	static constexpr uintptr_t CTRL_STAT_REG_B_ADDR = UCSR0B;
-	static constexpr volatile auto *CTRL_STAT_REG_C = &UCSR0C;
+	static constexpr uintptr_t CTRL_STAT_REG_C_ADDR = UCSR0C;
-	static constexpr volatile auto *BAUD_REG_L = &UBRR0L;
+	static constexpr uintptr_t BAUD_REG_L_ADDR = UBRR0L;
-	static constexpr volatile auto *BAUD_REG_H = &UBRR0H;
+	static constexpr uintptr_t BAUD_REG_H_ADDR = UBRR0H;
 };
 
+#undef _SFR_MEM8
+#define _SFR_MEM8(mem_addr) _MMIO_BYTE(mem_addr)
+
 enum class ControlFlagsA0 {
 	MULTI_PROC_COMM_MODE = MPCM0,
 	SPEED_2X = U2X0,
@@ -74,58 +89,24 @@ extern void (*fnDataReg0EmptyIntHandler)();
 } // namespace detail
 
 template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
-class Hardware0 {
+class Hardware0 : public detail::BlockingHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
-  public:
+                                                  detail::ControlFlagsC0, cfg, mode> {
-	using data_t = typename cfg::data_t;
-	static constexpr auto DATA_BITS = cfg::DATA_BITS;
-
-	static void init() FORCE_INLINE
-	{
-		HardwareImpl::init();
-	}
-
-	static void txByte(data_t byte) FORCE_INLINE
-	{
-		HardwareImpl::txByteBlocking(byte);
-	}
-
-	static bool rxByte(data_t &byte) FORCE_INLINE
-	{
-		return HardwareImpl::rxByteBlocking(byte);
-	}
-
-	static bool peek(data_t &byte) FORCE_INLINE
-	{
-		static_cast<void>(byte);
-		static_assert(driven == Driven::BLOCKING, "Peek with data is not supported in blocking mode");
-		return false;
-	}
-
-	static bool peek() FORCE_INLINE
-	{
-		return HardwareImpl::peekBlocking();
-	}
-
-	static void flushTx() FORCE_INLINE
-	{
-		while (!HardwareImpl::txEmpty())
-			;
-		while (!HardwareImpl::txComplete())
-			;
-		HardwareImpl::clearTxComplete();
-	}
-
-  private:
-	using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
-	                                      detail::ControlFlagsC0, cfg, driven, mode>;
 };
 
 template <class cfg, Mode mode>
-class Hardware0<cfg, Driven::INTERRUPT, mode> {
+class Hardware0<cfg, Driven::INTERRUPT, mode>
-  public:
+    : public detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
-	using data_t = typename cfg::data_t;
+                                       detail::ControlFlagsC0, cfg, mode> {
-	static constexpr auto DATA_BITS = cfg::DATA_BITS;
+	using detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
+	                                detail::ControlFlagsC0, cfg, mode>::rxIntHandler;
 
+	using detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
+	                                detail::ControlFlagsC0, cfg, mode>::dataRegEmptyIntHandler;
+
+	using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
+	                                      detail::ControlFlagsC0, cfg, Driven::INTERRUPT, mode>;
+
+  public:
 	static void init() FORCE_INLINE
 	{
 		detail::fnRx0IntHandler = rxIntHandler;
@@ -134,99 +115,8 @@ class Hardware0<cfg, Driven::INTERRUPT, mode> {
 		HardwareImpl::init();
 		sei();
 	}
-
-	static void txByte(const data_t &byte) FORCE_INLINE
-	{
-		uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
-		while (tmpHead == sm_txBuf.tail)
-			;
-
-		sm_txBuf.buf[tmpHead] = byte;
-		sm_txBuf.head = tmpHead;
-
-		HardwareImpl::enableDataRegEmptyInt();
-	}
-
-	static bool rxByte(data_t &byte) FORCE_INLINE
-	{
-		if (sm_rxBuf.head == sm_rxBuf.tail)
-			return false;
-
-		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
-		byte = sm_rxBuf.buf[tmpTail];
-		sm_rxBuf.tail = tmpTail;
-
-		return true;
-	}
-
-	static bool peek(data_t &byte) FORCE_INLINE
-	{
-		if (sm_rxBuf.head == sm_rxBuf.tail)
-			return false;
-
-		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
-		byte = sm_rxBuf.buf[tmpTail];
-
-		return true;
-	}
-
-	static bool peek() FORCE_INLINE
-	{
-		return (sm_rxBuf.head != sm_rxBuf.tail);
-	}
-
-	static void flushTx() FORCE_INLINE
-	{
-		while (sm_txBuf.head != sm_txBuf.tail)
-			;
-		while (!HardwareImpl::txEmpty())
-			;
-		while (!HardwareImpl::txComplete())
-			;
-		HardwareImpl::clearTxComplete();
-	}
-
-  private:
-	using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
-	                                      detail::ControlFlagsC0, cfg, Driven::INTERRUPT, mode>;
-
-	static constexpr auto TX_BUFFER_SIZE = 16;
-	static constexpr auto RX_BUFFER_SIZE = 16;
-
-	static volatile detail::RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
-	static volatile detail::RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
-
-	static void rxIntHandler()
-	{
-		uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
-
-		if (tmpHead != sm_rxBuf.tail) {
-			sm_rxBuf.head = tmpHead;
-			sm_rxBuf.buf[tmpHead] = HardwareImpl::rxByteInterrupt();
-		}
-	}
-
-	static void dataRegEmptyIntHandler() FORCE_INLINE
-	{
-		if (sm_txBuf.head != sm_txBuf.tail) {
-			uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
-			sm_txBuf.tail = tmpTail;
-			HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
-		} else
-			HardwareImpl::disableDataRegEmptyInt();
-	}
 };
 
-template <class cfg, Mode mode>
-volatile detail::RingBuffer<typename Hardware0<cfg, Driven::INTERRUPT, mode>::data_t,
-                            Hardware0<cfg, Driven::INTERRUPT, mode>::TX_BUFFER_SIZE>
-    Hardware0<cfg, Driven::INTERRUPT, mode>::sm_txBuf = {0, 0, {0}};
-
-template <class cfg, Mode mode>
-volatile detail::RingBuffer<typename Hardware0<cfg, Driven::INTERRUPT, mode>::data_t,
-                            Hardware0<cfg, Driven::INTERRUPT, mode>::RX_BUFFER_SIZE>
-    Hardware0<cfg, Driven::INTERRUPT, mode>::sm_rxBuf = {0, 0, {0}};
-
 } // namespace uart
 
 #undef FORCE_INLINE

hardware1.cpp

@@ -22,8 +22,6 @@ ISR(USART1_UDRE_vect)
 		fnDataReg1EmptyIntHandler();
 }
 
-#else
-#error "This chip is not supported"
 #endif
 
 } // namespace detail

hardware1.hpp

@@ -4,6 +4,7 @@
 
 #include <avr/interrupt.h>
 #include <avr/io.h>
+#include <avr/sfr_defs.h>
 
 #include "config.hpp"
 #include "hardware.hpp"
@@ -16,15 +17,29 @@ namespace detail {
 
 #if defined(__AVR_ATmega1284P__)
 
+/*
+The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's
+  constexpr auto *foo = ptr;
+
+Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site
+For this to work we need to temporarily disable the _SFR_MEM8 macro so that the register macro just gives the address
+*/
+
+#undef _SFR_MEM8
+#define _SFR_MEM8
+
 struct Registers1 {
-	static constexpr volatile auto *IO_REG = &UDR1;
+	static constexpr uintptr_t IO_REG_ADDR = UDR1;
-	static constexpr volatile auto *CTRL_STAT_REG_A = &UCSR1A;
+	static constexpr uintptr_t CTRL_STAT_REG_A_ADDR = UCSR1A;
-	static constexpr volatile auto *CTRL_STAT_REG_B = &UCSR1B;
+	static constexpr uintptr_t CTRL_STAT_REG_B_ADDR = UCSR1B;
-	static constexpr volatile auto *CTRL_STAT_REG_C = &UCSR1C;
+	static constexpr uintptr_t CTRL_STAT_REG_C_ADDR = UCSR1C;
-	static constexpr volatile auto *BAUD_REG_L = &UBRR1L;
+	static constexpr uintptr_t BAUD_REG_L_ADDR = UBRR1L;
-	static constexpr volatile auto *BAUD_REG_H = &UBRR1H;
+	static constexpr uintptr_t BAUD_REG_H_ADDR = UBRR1H;
 };
 
+#undef _SFR_MEM8
+#define _SFR_MEM8(mem_addr) _MMIO_BYTE(mem_addr)
+
 enum class ControlFlagsA1 {
 	MULTI_PROC_COMM_MODE = MPCM1,
 	SPEED_2X = U2X1,
@@ -69,8 +84,6 @@ extern void (*fnDataReg1EmptyIntHandler)();
 
 #define HAS_UART1
 
-#else
-#error "This chip is not supported"
 #endif
 
 } // namespace detail
@@ -78,58 +91,24 @@ extern void (*fnDataReg1EmptyIntHandler)();
 #ifdef HAS_UART1
 
 template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
-class Hardware1 {
+class Hardware1 : public detail::BlockingHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
-  public:
+                                                  detail::ControlFlagsC1, cfg, mode> {
-	using data_t = typename cfg::data_t;
-	static constexpr auto DATA_BITS = cfg::DATA_BITS;
-
-	static void init() FORCE_INLINE
-	{
-		HardwareImpl::init();
-	}
-
-	static void txByte(const data_t &byte) FORCE_INLINE
-	{
-		HardwareImpl::txByteBlocking(byte);
-	}
-
-	static bool rxByte(data_t &byte) FORCE_INLINE
-	{
-		return HardwareImpl::rxByteBlocking(byte);
-	}
-
-	static bool peek(data_t &byte) FORCE_INLINE
-	{
-		static_cast<void>(byte);
-		static_assert(driven != Driven::BLOCKING, "Peek with data is not supported in blocking mode");
-		return false;
-	}
-
-	static bool peek() FORCE_INLINE
-	{
-		return HardwareImpl::peekBlocking();
-	}
-
-	static void flushTx() FORCE_INLINE
-	{
-		while (!HardwareImpl::txEmpty())
-			;
-		while (!HardwareImpl::txComplete())
-			;
-		HardwareImpl::clearTxComplete();
-	}
-
-  private:
-	using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
-	                                      detail::ControlFlagsC1, cfg, driven, mode>;
 };
 
 template <class cfg, Mode mode>
-class Hardware1<cfg, Driven::INTERRUPT, mode> {
+class Hardware1<cfg, Driven::INTERRUPT, mode>
-  public:
+    : public detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
-	using data_t = typename cfg::data_t;
+                                       detail::ControlFlagsC1, cfg, mode> {
-	static constexpr auto DATA_BITS = cfg::DATA_BITS;
+	using detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
+	                                detail::ControlFlagsC1, cfg, mode>::rxIntHandler;
 
+	using detail::InterruptHardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
+	                                detail::ControlFlagsC1, cfg, mode>::dataRegEmptyIntHandler;
+
+	using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
+	                                      detail::ControlFlagsC1, cfg, Driven::INTERRUPT, mode>;
+
+  public:
 	static void init() FORCE_INLINE
 	{
 		detail::fnRx1IntHandler = rxIntHandler;
@@ -138,99 +117,8 @@ class Hardware1<cfg, Driven::INTERRUPT, mode> {
 		HardwareImpl::init();
 		sei();
 	}
-
-	static void txByte(const data_t &byte) FORCE_INLINE
-	{
-		uint8_t tmpHead = (sm_txBuf.head + 1) % TX_BUFFER_SIZE;
-		while (tmpHead == sm_txBuf.tail)
-			;
-
-		sm_txBuf.buf[tmpHead] = byte;
-		sm_txBuf.head = tmpHead;
-
-		HardwareImpl::enableDataRegEmptyInt();
-	}
-
-	static bool rxByte(data_t &byte) FORCE_INLINE
-	{
-		if (sm_rxBuf.head == sm_rxBuf.tail)
-			return false;
-
-		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
-		byte = sm_rxBuf.buf[tmpTail];
-		sm_rxBuf.tail = tmpTail;
-
-		return true;
-	}
-
-	static bool peek(data_t &byte) FORCE_INLINE
-	{
-		if (sm_rxBuf.head == sm_rxBuf.tail)
-			return false;
-
-		uint8_t tmpTail = (sm_rxBuf.tail + 1) % RX_BUFFER_SIZE;
-		byte = sm_rxBuf.buf[tmpTail];
-
-		return true;
-	}
-
-	static bool peek() FORCE_INLINE
-	{
-		return (sm_rxBuf.head != sm_rxBuf.tail);
-	}
-
-	static void flushTx() FORCE_INLINE
-	{
-		while (sm_txBuf.head != sm_txBuf.tail)
-			;
-		while (!HardwareImpl::txEmpty())
-			;
-		while (!HardwareImpl::txComplete())
-			;
-		HardwareImpl::clearTxComplete();
-	}
-
-  private:
-	using HardwareImpl = detail::Hardware<detail::Registers1, detail::ControlFlagsA1, detail::ControlFlagsB1,
-	                                      detail::ControlFlagsC1, cfg, Driven::INTERRUPT, mode>;
-
-	static constexpr auto TX_BUFFER_SIZE = 16;
-	static constexpr auto RX_BUFFER_SIZE = 16;
-
-	static volatile detail::RingBuffer<data_t, TX_BUFFER_SIZE> sm_txBuf;
-	static volatile detail::RingBuffer<data_t, RX_BUFFER_SIZE> sm_rxBuf;
-
-	static void rxIntHandler()
-	{
-		uint8_t tmpHead = (sm_rxBuf.head + 1) % RX_BUFFER_SIZE;
-
-		if (tmpHead != sm_rxBuf.tail) {
-			sm_rxBuf.head = tmpHead;
-			sm_rxBuf.buf[tmpHead] = HardwareImpl::rxByteInterrupt();
-		}
-	}
-
-	static void dataRegEmptyIntHandler() FORCE_INLINE
-	{
-		if (sm_txBuf.head != sm_txBuf.tail) {
-			uint8_t tmpTail = (sm_txBuf.tail + 1) % TX_BUFFER_SIZE;
-			sm_txBuf.tail = tmpTail;
-			HardwareImpl::txByteInterrupt(sm_txBuf.buf[tmpTail]);
-		} else
-			HardwareImpl::disableDataRegEmptyInt();
-	}
 };
 
-template <class cfg, Mode mode>
-volatile detail::RingBuffer<typename Hardware1<cfg, Driven::INTERRUPT, mode>::data_t,
-                            Hardware1<cfg, Driven::INTERRUPT, mode>::TX_BUFFER_SIZE>
-    Hardware1<cfg, Driven::INTERRUPT, mode>::sm_txBuf = {0, 0, {0}};
-
-template <class cfg, Mode mode>
-volatile detail::RingBuffer<typename Hardware1<cfg, Driven::INTERRUPT, mode>::data_t,
-                            Hardware1<cfg, Driven::INTERRUPT, mode>::RX_BUFFER_SIZE>
-    Hardware1<cfg, Driven::INTERRUPT, mode>::sm_rxBuf = {0, 0, {0}};
-
 #endif
 
 } // namespace uart

uart.hpp

@@ -36,18 +36,6 @@ static constexpr size_t maxNumDigits()
 	constexpr T minVal = util::NumericLimits<T>::min();
 	constexpr T maxVal = util::NumericLimits<T>::max();
 
-	T minDigits = cntDigits<T, minVal, Base>() + ((minVal < 0) ? 1 : 0);
-	T maxDigits = cntDigits<T, maxVal, Base>() + ((maxVal < 0) ? 1 : 0);
-
-	return (minDigits < maxDigits) ? maxDigits : minDigits;
-}
-
-template <typename T, size_t Base>
-static constexpr size_t maxPadding()
-{
-	constexpr T minVal = util::NumericLimits<T>::min();
-	constexpr T maxVal = util::NumericLimits<T>::max();
-
 	T minDigits = cntDigits<T, minVal, Base>();
 	T maxDigits = cntDigits<T, maxVal, Base>();
 
@@ -125,9 +113,9 @@ class Uart {
 	static void txNumber(const T &val)
 	{
 		static_assert(util::is_integral_v<T>, "Only supported on integral types");
-		static_assert(Base >= 2, "Numbers with bases less than 2 make no sense");
+		static_assert(Base >= 2, "Numbers with base less than 2 make no sense");
-		static_assert(Base <= 16, "Numbers with bases higher than 16 are not supported");
+		static_assert(Base <= 16, "Numbers with base higher than 16 are not supported");
-		static_assert(Padding <= detail::maxPadding<T, Base>(), "Cannot pad more than maximum length of number");
+		static_assert(Padding <= detail::maxNumDigits<T, Base>(), "Cannot pad more than maximum length of number");
 
 		constexpr char alphaChar = (LowerCase) ? 'a' : 'A';
 		constexpr size_t numDigits = detail::maxNumDigits<T, Base>();
@@ -270,7 +258,7 @@ class Uart {
 	Uart &operator<<(const void *val)
 	{
 		txString(F("0x"));
-		txNumber<uint16_t, 16>(reinterpret_cast<uint16_t>(val));
+		txNumber<uint16_t, 16, 4, '0', false>(reinterpret_cast<uint16_t>(val));
 		return *this;
 	}