2016-05-19 21:43:10 +02:00
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/*
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2018-04-12 10:44:03 +02:00
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* Copyright (c) by BlackMark 2015-2018
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* Date 12/04/2018
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* Version 3.4
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2016-05-19 21:43:10 +02:00
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*/
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#ifndef USART_H
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#define USART_H
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#include <avr/io.h>
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2016-05-20 22:27:57 +02:00
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#include <avr/interrupt.h>
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2016-05-19 21:43:10 +02:00
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#include <stdint.h>
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2016-05-20 17:02:23 +02:00
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#include <string.h>
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2016-05-24 21:11:44 +02:00
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#include "../clock.h"
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2016-05-19 21:43:10 +02:00
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2019-07-27 18:54:51 +02:00
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#if defined (__AVR_ATmega168A__) || defined (__AVR_ATmega328P__) || defined (__AVR_ATmega644P__)
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2016-05-19 21:43:10 +02:00
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#define USART_SPI
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2016-05-20 22:27:57 +02:00
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#define USART0_RX_vect_D USART_RX_vect
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#define USART0_UDRE_vect_D USART_UDRE_vect
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2016-05-19 21:43:10 +02:00
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#endif
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2018-04-12 10:44:03 +02:00
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#if defined (__AVR_ATmega32A__) || (__AVR_ATmega8__) || (__AVR_ATmega8A__)
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2016-05-19 21:43:10 +02:00
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#define USART_SHAREDIO
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2016-05-20 22:27:57 +02:00
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#define USART0_RX_vect_D USART_RXC_vect
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#define USART0_UDRE_vect_D USART_UDRE_vect
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2016-05-19 21:43:10 +02:00
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#endif
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#if defined (__AVR_ATmega1284P__)
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2019-07-27 18:54:51 +02:00
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#define USART_SPI
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2016-05-19 21:43:10 +02:00
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#define SECOND_USART
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2016-05-20 22:27:57 +02:00
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#define USART0_RX_vect_D USART0_RX_vect
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#define USART1_RX_vect_D USART1_RX_vect
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#define USART0_UDRE_vect_D USART0_UDRE_vect
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#define USART1_UDRE_vect_D USART1_UDRE_vect
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2016-05-19 21:43:10 +02:00
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#endif
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2016-05-19 22:13:06 +02:00
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#ifdef USART_SHAREDIO
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#define RXEN_D RXEN
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#define TXEN_D TXEN
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2016-05-20 22:27:57 +02:00
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#define RXCIE_D RXCIE
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#define UDRIE_D UDRIE
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2016-05-19 22:13:06 +02:00
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#define UCSZ0_D UCSZ0
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#define UCSZ1_D UCSZ1
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#define UCSZ2_D UCSZ2
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#define UPM0_D UPM0
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#define UPM1_D UPM1
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#define USBS_D USBS
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#define RXC_D RXC
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#define UDRE_D UDRE
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#else
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#define RXEN_D RXEN0
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#define TXEN_D TXEN0
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2016-05-20 22:27:57 +02:00
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#define RXCIE_D RXCIE0
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#define UDRIE_D UDRIE0
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2016-05-19 22:13:06 +02:00
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#define UCSZ0_D UCSZ00
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#define UCSZ1_D UCSZ01
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#define UCSZ2_D UCSZ02
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#define UPM0_D UPM00
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#define UPM1_D UPM01
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#define USBS_D USBS0
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#define RXC_D RXC0
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#define UDRE_D UDRE0
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#endif
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#ifdef USART_SPI
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#define UMSEL0_D UMSEL00
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#define UMSEL1_D UMSEL01
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#else
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#define UMSEL_D UMSEL
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#endif
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2016-05-19 21:43:10 +02:00
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class USART0
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{
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public:
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enum class Mode
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{
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ASYNCHRONOUS = 0,
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SYNCHRONOUS = 1,
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#ifdef USART_SPI
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MASTERSPI = 2
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#endif
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};
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2016-05-19 21:43:10 +02:00
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enum class Parity
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{
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DISABLED = 0,
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ODD = 1,
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EVEN = 2
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};
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2016-05-19 21:43:10 +02:00
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enum class StopBit
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{
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ONE = 1,
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TWO = 2
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};
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2016-05-20 15:51:01 +02:00
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2016-05-20 22:27:57 +02:00
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static constexpr size_t sm_sizeRXBUFFER_SIZE = 16;
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static constexpr size_t sm_sizeTXBUFFER_SIZE = 16;
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2016-05-19 21:43:10 +02:00
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protected:
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volatile uint8_t *m_vui8pUCSRA;
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volatile uint8_t *m_vui8pUCSRB;
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volatile uint8_t *m_vui8pUCSRC;
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volatile uint8_t *m_vui8pUBRRH;
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volatile uint8_t *m_vui8pUBRRL;
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volatile uint8_t *m_vui8pUDR;
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2016-05-20 22:27:57 +02:00
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volatile size_t m_vsizeRXBufferHead;
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volatile size_t m_vsizeRXBufferTail;
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volatile size_t m_vsizeTXBufferHead;
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volatile size_t m_vsizeTXBufferTail;
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volatile uint8_t m_vui8aRXBuffer[sm_sizeRXBUFFER_SIZE];
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volatile uint8_t m_vui8aTXBuffer[sm_sizeTXBUFFER_SIZE];
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USART0();
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2016-05-19 21:43:10 +02:00
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private:
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2016-05-20 22:27:57 +02:00
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static USART0 sm_cInstance;
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2016-05-19 21:43:10 +02:00
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uint8_t readUCSRC();
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void setUCSRC( uint8_t ui8UCSRC );
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void setRXState( bool bEnable );
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void setTXState( bool bEnable );
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2016-05-20 22:27:57 +02:00
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void setRXInterrupt( bool bEnable );
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void setUDREInterrupt( bool bEnable );
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2016-05-19 21:43:10 +02:00
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void setBaudRate( uint32_t ui32BaudRate );
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void setDataBits( uint8_t ui8DataBits );
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void setParity( Parity enmParity );
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void setStopBits( StopBit enmStopBits );
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void setMode( Mode enmMode );
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2016-05-25 21:22:16 +02:00
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uint32_t getBaudRate();
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uint8_t getDataBits();
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Parity getParity();
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StopBit getStopBits();
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2019-07-27 18:54:51 +02:00
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public:
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2016-05-24 20:59:46 +02:00
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~USART0();
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2016-05-20 22:27:57 +02:00
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static USART0& inst();
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USART0( const USART0& ) = delete;
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void operator=( const USART0& ) = delete;
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2016-05-20 15:51:01 +02:00
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2016-05-19 22:59:22 +02:00
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void init( uint32_t ui32BaudRate = 9600, uint8_t ui8DataBits = 8, Parity enmParity = Parity::DISABLED, StopBit enmStopBits = StopBit::ONE, Mode enmMode = Mode::ASYNCHRONOUS );
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2016-05-20 15:51:01 +02:00
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2016-05-20 22:27:57 +02:00
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bool receiveByte( uint8_t &ui8Data );
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2016-05-24 20:59:46 +02:00
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bool receiveByte( uint8_t &ui8Data, uint16_t ui16TimeoutMS );
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2016-05-26 20:15:21 +02:00
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uint8_t receiveByteBlocked();
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uint8_t receivePeek();
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2016-05-21 21:49:56 +02:00
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bool receiveLine( char *szBuffer, size_t sizeBufferLength, const char *szLineTerminator = "\r\n" );
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2016-05-25 23:38:02 +02:00
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bool receiveLine( char *szBuffer, size_t sizeBufferLength, uint16_t ui16TimeoutMS, const char *szLineTerminator = "\r\n" );
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2016-05-24 21:08:06 +02:00
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void flushReceive();
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2016-05-20 15:51:01 +02:00
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2016-05-20 17:02:23 +02:00
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void transmitByte( uint8_t ui8Data );
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void transmitString( const char *szString );
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2016-05-24 20:59:46 +02:00
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void flushTransmit();
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2016-05-20 22:27:57 +02:00
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void receiveInterruptHandler();
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void transmitInterruptHandler();
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2016-05-21 20:39:37 +02:00
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inline USART0& operator<<( const char *szString )
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{
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transmitString( szString );
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return *this;
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}
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2016-05-19 21:43:10 +02:00
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};
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#ifdef SECOND_USART
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class USART1 : public USART0
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{
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public:
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2016-05-20 22:33:47 +02:00
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static USART1& inst();
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USART1( const USART1& ) = delete;
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void operator=( const USART1& ) = delete;
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private:
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static USART1 sm_cInstance;
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2016-05-19 21:43:10 +02:00
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USART1();
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};
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#endif
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2016-05-20 15:55:19 +02:00
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#endif
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