2016-05-19 21:43:10 +02:00
|
|
|
/*
|
|
|
|
* Copyright (c) by BlackMark 2015-2016
|
2016-10-29 17:22:34 +02:00
|
|
|
* Date 26/05/2016
|
|
|
|
* Version 3.3
|
2016-05-19 21:43:10 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef USART_H
|
|
|
|
#define USART_H
|
|
|
|
|
|
|
|
#include <avr/io.h>
|
2016-05-20 22:27:57 +02:00
|
|
|
#include <avr/interrupt.h>
|
2016-05-19 21:43:10 +02:00
|
|
|
#include <stdint.h>
|
2016-05-20 17:02:23 +02:00
|
|
|
#include <string.h>
|
2016-05-20 15:51:01 +02:00
|
|
|
#include "clock.h"
|
2016-05-19 21:43:10 +02:00
|
|
|
|
|
|
|
#if defined (__AVR_ATmega168A__) || defined (__AVR_ATmega328P__) || defined (__AVR_ATmega644P__) || defined (__AVR_ATmega1284P__)
|
|
|
|
#define USART_SPI
|
2016-05-20 22:27:57 +02:00
|
|
|
#define USART0_RX_vect_D USART_RX_vect
|
|
|
|
#define USART0_UDRE_vect_D USART_UDRE_vect
|
2016-05-19 21:43:10 +02:00
|
|
|
#endif
|
|
|
|
#if defined (__AVR_ATmega32A__) || (__AVR_ATmega8__)
|
|
|
|
#define USART_SHAREDIO
|
2016-05-20 22:27:57 +02:00
|
|
|
#define USART0_RX_vect_D USART_RXC_vect
|
|
|
|
#define USART0_UDRE_vect_D USART_UDRE_vect
|
2016-05-19 21:43:10 +02:00
|
|
|
#endif
|
|
|
|
#if defined (__AVR_ATmega1284P__)
|
|
|
|
#define SECOND_USART
|
2016-05-20 22:27:57 +02:00
|
|
|
#define USART0_RX_vect_D USART0_RX_vect
|
|
|
|
#define USART1_RX_vect_D USART1_RX_vect
|
|
|
|
#define USART0_UDRE_vect_D USART0_UDRE_vect
|
|
|
|
#define USART1_UDRE_vect_D USART1_UDRE_vect
|
2016-05-19 21:43:10 +02:00
|
|
|
#endif
|
|
|
|
|
2016-05-19 22:13:06 +02:00
|
|
|
#ifdef USART_SHAREDIO
|
|
|
|
#define RXEN_D RXEN
|
|
|
|
#define TXEN_D TXEN
|
2016-05-20 22:27:57 +02:00
|
|
|
#define RXCIE_D RXCIE
|
|
|
|
#define UDRIE_D UDRIE
|
2016-05-19 22:13:06 +02:00
|
|
|
#define UCSZ0_D UCSZ0
|
|
|
|
#define UCSZ1_D UCSZ1
|
|
|
|
#define UCSZ2_D UCSZ2
|
|
|
|
#define UPM0_D UPM0
|
|
|
|
#define UPM1_D UPM1
|
|
|
|
#define USBS_D USBS
|
|
|
|
#define RXC_D RXC
|
|
|
|
#define UDRE_D UDRE
|
|
|
|
#else
|
|
|
|
#define RXEN_D RXEN0
|
|
|
|
#define TXEN_D TXEN0
|
2016-05-20 22:27:57 +02:00
|
|
|
#define RXCIE_D RXCIE0
|
|
|
|
#define UDRIE_D UDRIE0
|
2016-05-19 22:13:06 +02:00
|
|
|
#define UCSZ0_D UCSZ00
|
|
|
|
#define UCSZ1_D UCSZ01
|
|
|
|
#define UCSZ2_D UCSZ02
|
|
|
|
#define UPM0_D UPM00
|
|
|
|
#define UPM1_D UPM01
|
|
|
|
#define USBS_D USBS0
|
|
|
|
#define RXC_D RXC0
|
|
|
|
#define UDRE_D UDRE0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef USART_SPI
|
|
|
|
#define UMSEL0_D UMSEL00
|
|
|
|
#define UMSEL1_D UMSEL01
|
|
|
|
#else
|
|
|
|
#define UMSEL_D UMSEL
|
|
|
|
#endif
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
class USART0
|
|
|
|
{
|
|
|
|
public:
|
|
|
|
enum class Mode
|
|
|
|
{
|
|
|
|
ASYNCHRONOUS = 0,
|
|
|
|
SYNCHRONOUS = 1,
|
|
|
|
#ifdef USART_SPI
|
|
|
|
MASTERSPI = 2
|
|
|
|
#endif
|
|
|
|
};
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
enum class Parity
|
|
|
|
{
|
|
|
|
DISABLED = 0,
|
|
|
|
ODD = 1,
|
|
|
|
EVEN = 2
|
|
|
|
};
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
enum class StopBit
|
|
|
|
{
|
|
|
|
ONE = 1,
|
|
|
|
TWO = 2
|
|
|
|
};
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-20 22:27:57 +02:00
|
|
|
static constexpr size_t sm_sizeRXBUFFER_SIZE = 16;
|
|
|
|
static constexpr size_t sm_sizeTXBUFFER_SIZE = 16;
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
protected:
|
|
|
|
volatile uint8_t *m_vui8pUCSRA;
|
|
|
|
volatile uint8_t *m_vui8pUCSRB;
|
|
|
|
volatile uint8_t *m_vui8pUCSRC;
|
|
|
|
volatile uint8_t *m_vui8pUBRRH;
|
|
|
|
volatile uint8_t *m_vui8pUBRRL;
|
|
|
|
volatile uint8_t *m_vui8pUDR;
|
|
|
|
|
2016-05-20 22:27:57 +02:00
|
|
|
volatile size_t m_vsizeRXBufferHead;
|
|
|
|
volatile size_t m_vsizeRXBufferTail;
|
|
|
|
volatile size_t m_vsizeTXBufferHead;
|
|
|
|
volatile size_t m_vsizeTXBufferTail;
|
|
|
|
|
|
|
|
volatile uint8_t m_vui8aRXBuffer[sm_sizeRXBUFFER_SIZE];
|
|
|
|
volatile uint8_t m_vui8aTXBuffer[sm_sizeTXBUFFER_SIZE];
|
|
|
|
|
|
|
|
USART0();
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
private:
|
2016-05-20 22:27:57 +02:00
|
|
|
static USART0 sm_cInstance;
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
uint8_t readUCSRC();
|
|
|
|
void setUCSRC( uint8_t ui8UCSRC );
|
|
|
|
|
|
|
|
void setRXState( bool bEnable );
|
|
|
|
void setTXState( bool bEnable );
|
2016-05-20 22:27:57 +02:00
|
|
|
void setRXInterrupt( bool bEnable );
|
|
|
|
void setUDREInterrupt( bool bEnable );
|
2016-05-19 21:43:10 +02:00
|
|
|
void setBaudRate( uint32_t ui32BaudRate );
|
|
|
|
void setDataBits( uint8_t ui8DataBits );
|
|
|
|
void setParity( Parity enmParity );
|
|
|
|
void setStopBits( StopBit enmStopBits );
|
|
|
|
void setMode( Mode enmMode );
|
|
|
|
|
2016-10-29 17:22:34 +02:00
|
|
|
uint32_t getBaudRate();
|
|
|
|
uint8_t getDataBits();
|
|
|
|
Parity getParity();
|
|
|
|
StopBit getStopBits();
|
|
|
|
|
2016-05-24 20:59:46 +02:00
|
|
|
~USART0();
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
public:
|
2016-05-20 22:27:57 +02:00
|
|
|
static USART0& inst();
|
|
|
|
USART0( const USART0& ) = delete;
|
|
|
|
void operator=( const USART0& ) = delete;
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-19 22:59:22 +02:00
|
|
|
void init( uint32_t ui32BaudRate = 9600, uint8_t ui8DataBits = 8, Parity enmParity = Parity::DISABLED, StopBit enmStopBits = StopBit::ONE, Mode enmMode = Mode::ASYNCHRONOUS );
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-20 22:27:57 +02:00
|
|
|
bool receiveByte( uint8_t &ui8Data );
|
2016-05-24 20:59:46 +02:00
|
|
|
bool receiveByte( uint8_t &ui8Data, uint16_t ui16TimeoutMS );
|
2016-10-29 17:22:34 +02:00
|
|
|
uint8_t receiveByteBlocked();
|
|
|
|
uint8_t receivePeek();
|
2016-05-21 21:49:56 +02:00
|
|
|
bool receiveLine( char *szBuffer, size_t sizeBufferLength, const char *szLineTerminator = "\r\n" );
|
2016-10-29 17:22:34 +02:00
|
|
|
bool receiveLine( char *szBuffer, size_t sizeBufferLength, uint16_t ui16TimeoutMS, const char *szLineTerminator = "\r\n" );
|
2016-05-24 21:08:06 +02:00
|
|
|
void flushReceive();
|
2016-05-20 15:51:01 +02:00
|
|
|
|
2016-05-20 17:02:23 +02:00
|
|
|
void transmitByte( uint8_t ui8Data );
|
|
|
|
void transmitString( const char *szString );
|
2016-05-24 20:59:46 +02:00
|
|
|
void flushTransmit();
|
2016-05-20 22:27:57 +02:00
|
|
|
|
|
|
|
void receiveInterruptHandler();
|
|
|
|
void transmitInterruptHandler();
|
2016-05-21 20:39:37 +02:00
|
|
|
|
|
|
|
inline USART0& operator<<( const char *szString )
|
|
|
|
{
|
|
|
|
transmitString( szString );
|
|
|
|
return *this;
|
|
|
|
}
|
2016-05-19 21:43:10 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
#ifdef SECOND_USART
|
|
|
|
|
|
|
|
class USART1 : public USART0
|
|
|
|
{
|
|
|
|
public:
|
2016-05-20 22:33:47 +02:00
|
|
|
static USART1& inst();
|
|
|
|
USART1( const USART1& ) = delete;
|
|
|
|
void operator=( const USART1& ) = delete;
|
|
|
|
|
|
|
|
private:
|
|
|
|
static USART1 sm_cInstance;
|
|
|
|
|
2016-05-19 21:43:10 +02:00
|
|
|
USART1();
|
|
|
|
};
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2016-05-20 15:55:19 +02:00
|
|
|
#endif
|