BlackMark eca7a41051 pureboot: gitignore python bytecode cache ...

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01AReSwkWkPX2A9Ym6grxRAh

2026-07-20 10:43:56 +02:00

oracle

tsb: third size pass — restructure to the oracle's shape

2026-07-20 01:00:27 +02:00

pureboot

pureboot: stop tracking the python bytecode cache

2026-07-20 10:43:36 +02:00

test

pureboot: host tool and end-to-end protocol tests, all three chips

2026-07-20 05:54:15 +02:00

tsb

tsb: third size pass — restructure to the oracle's shape

2026-07-20 01:00:27 +02:00

.clang-format

tsb: reimplement TinySafeBoot on libavr in three size tiers

2026-07-19 05:00:51 +02:00

.gitattributes

Initial commit

2020-04-10 08:47:54 +02:00

.gitignore

pureboot: gitignore python bytecode cache

2026-07-20 10:43:56 +02:00

CMakeLists.txt

pureboot: host tool and end-to-end protocol tests, all three chips

2026-07-20 05:54:15 +02:00

CMakePresets.json

pureboot: the device — one pure C++ source, 512 bytes, every chip

2026-07-20 05:33:28 +02:00

LICENSE

Initial commit

2020-04-10 08:47:54 +02:00

Description

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3.4 MiB

Languages

C++ 100%