The image now runs from any 512-byte slot with every command intact: control flow stays PC-relative, the write guard keys on the running slot (the return-address anchor, computed once), the info block is addressed from that same anchor as a byte pair (no absolute 16-bit address in the image), and the application jump is an indirect call through a noipa- laundered pointer to the absolute entry. 'J' — jump to a wire word address, the one transfer primitive — replaces 'G': the host knows the application entry from the info block, and moving between loader copies needs arbitrary targets. The activation window is a compile-time 8 s (PUREBOOT_TIMEOUT overrides), counted as a single calibrated poll loop. A refused page no longer poisons the write-once temporary buffer (a real silicon trap: the next write would program the drained data): every page write discards the buffer first — CTPB on the tinies, on the mega the same RWWSRE store that re-enables RWW after programming. The tinies' post-op busy-waits go with it: their CPU halts through page erase and write. 488 / 502 / 504 B on t13a / t85 / mega — under the tinies' 510-byte budget, whose last slot word is the host-managed trampoline: the resident's holds the application entry, a staging copy's the jump through which an abandoned update still times out into a loader. The host tool updates the loader with itself: --update-loader installs the identical image one slot below the resident, jumps into it, lets it rewrite the resident, and restores the staging region from a state file — each phase idempotent off the flash state, resumable after any interruption (t13a: the staging slot carries the reset vector, written last in and first out; t85: word 0 redirected around the resident rewrite; mega: fuse-matrix preflight with a hard BOOTSZ gate and --assume-fuses for simulators). Application flashing recovers by reset from any interruption: patched page 0 and trampoline first, erase descending, and a walk-region refusal behind --force on BOOTRST-below-loader megas. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
417 lines
14 KiB
C++
417 lines
14 KiB
C++
// pureboot — a serial bootloader on libavr, pure by constraint: one C++
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// source with no inline assembly and no global register variables, built for
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// every chip libavr targets, 512 bytes on each. The device speaks primitives
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// — read/program flash, read/write EEPROM, fuse bytes, an info block, a jump
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// — and everything composite (verify, erase, reset-vector surgery, updating
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// the loader itself) lives in the host tool. Protocol reference: README.md
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// next to this file.
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//
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// The image is position-independent: control flow is PC-relative, the write
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// and read paths take wire addresses, the write guard refuses the 512-byte
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// slot the code is *running* in (taken from the runtime return address), the
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// info block is read relative to that same anchor, and the application jump
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// is an indirect call to an absolute entry. The identical binary therefore
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// runs from any 512-byte slot with every command intact: flashed one slot
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// below the resident loader it becomes the staging loader that rewrites the
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// resident — how pureboot updates itself, host-driven, with no other
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// firmware involved.
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//
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// Entry: reset lands in avr::startup::entry below (BOOTRST on the mega; the
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// patched reset vector — or erased flash walking up into the loader — on the
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// tinies). A watchdog reset hands straight to the application. Otherwise the
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// host has one activation window per awaited knock byte ("pb"); an idle line
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// boots the application. A session then stays in the command loop until 'J'
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// jumps away or the chip resets.
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#include <libavr/libavr.hpp>
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using namespace avr::literals;
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namespace spm = avr::spm;
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namespace ee = avr::eeprom;
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namespace pureboot {
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namespace {
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// Purely polled — interrupts stay off, every guard folds to nothing.
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constexpr auto off = avr::irq::guard_policy::unused;
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constexpr std::uint8_t ack = '+';
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// Per-chip personality, from the chip database: the clocks the dogfood
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// boards run (16 MHz crystal on the mega, calibrated RC on the tinies) and
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// the device signature (compile-time data — the tiny13A cannot even read its
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// signature row from code).
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consteval avr::hertz_t clock()
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{
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if (avr::hw::db.name == "ATtiny13A")
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return 9.6_MHz;
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if (avr::hw::db.name == "ATtiny85")
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return 8_MHz;
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return 16_MHz;
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}
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consteval std::array<std::uint8_t, 3> signature()
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{
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if (avr::hw::db.name == "ATtiny13A")
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return {0x1e, 0x90, 0x07};
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if (avr::hw::db.name == "ATtiny85")
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return {0x1e, 0x93, 0x0b};
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return {0x1e, 0x95, 0x0f};
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}
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using dev = avr::device<{.clock = clock()}>;
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// Geometry: the resident loader owns the top 512 bytes of flash; the word
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// below it is the trampoline (the application's relocated reset vector) on
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// chips without a hardware boot section. The RWWSRE bit marks a separate
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// boot section — on classic AVR the two capabilities coincide.
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constexpr std::uint16_t boot_bytes = 512;
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constexpr std::uint16_t base = static_cast<std::uint16_t>(spm::flash_bytes - boot_bytes);
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constexpr std::uint16_t page = spm::page_bytes;
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constexpr bool boot_section = avr::hw::db.field_index("SPMCSR", "RWWSRE") >= 0;
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// The activation window, in seconds, is a compile-time constant (the build
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// may override it): the whole EEPROM belongs to the application, and
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// re-timing the loader is a bootloader self-update with a re-timed binary.
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#if !defined(PUREBOOT_TIMEOUT)
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#define PUREBOOT_TIMEOUT 8
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#endif
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constexpr std::uint8_t timeout_seconds = PUREBOOT_TIMEOUT;
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// The 12-byte info block the host reads with the 'b' command; flash-resident
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// (there is no crt to copy a .data image).
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inline constexpr std::array<std::uint8_t, 12> info_data = {
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'P',
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'B',
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1, // magic, protocol version
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signature()[0],
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signature()[1],
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signature()[2],
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static_cast<std::uint8_t>(page),
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base & 0xff,
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base >> 8, // app flash ends here; resident loader base
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avr::hw::db.mem.eeprom_size & 0xff,
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avr::hw::db.mem.eeprom_size >> 8,
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boot_section ? 0 : 1, // bit 0: host must patch the reset vector (no hardware boot section)
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};
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using info = avr::flash_table<info_data>;
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// The serial link: the hardware USART where the chip has one, the polled
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// software UART (no vector — the table belongs to the application) on PB0/PB1
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// elsewhere. Both are class templates on the clock so only the selected
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// backend is ever instantiated. pending() is the cheap line test the
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// activation window polls; rx() then picks the byte up; drain() holds until
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// the last transmitted frame is fully on the wire (the jump hand-over must
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// not let the target's re-init clip the ack).
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template <avr::hertz_t C>
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consteval std::int16_t rxc_field()
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{
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return avr::hw::db.field_index("UCSR0A", "RXC0");
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}
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template <avr::hertz_t C>
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consteval std::int16_t txc_field()
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{
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return avr::hw::db.field_index("UCSR0A", "TXC0");
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}
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template <avr::hertz_t C>
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consteval std::int16_t status_reg()
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{
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return avr::hw::db.reg_index("UCSR0A");
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}
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template <avr::hertz_t C>
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struct hardware_link {
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using uart = avr::uart::usart0<C, {.baud = 115200_Bd, .max_baud_error = 2.5_pct}>;
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// The compiled idle poll: lds UCSR0A (2), sbrc skipping the exit (2),
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// sbiw + sbci + sbci + brne (6).
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static constexpr std::uint8_t poll_cycles = 10;
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static void init()
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{
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avr::init<uart>();
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}
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static bool pending()
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{
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return avr::hw::field_impl<rxc_field<C>()>::test();
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}
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static std::uint8_t rx()
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{
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return uart::read_blocking();
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}
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static void tx(std::uint8_t byte)
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{
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uart::write(byte);
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}
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static void drain()
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{
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// write() leaves the byte draining behind it. Clear a stale TXC0
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// first (W1C by writing the sampled status back — the store a hand
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// assembler writes, keeping U2X0), then wait for the fresh
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// completion; with a byte still ahead in the shifter TXC0 cannot
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// re-set until the last pending byte has fully left.
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using status = avr::hw::reg_impl<status_reg<C>()>;
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status::write(status::read());
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while (!avr::hw::field_impl<txc_field<C>()>::test()) {
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}
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}
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};
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template <avr::hertz_t C>
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struct software_link {
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using rx_t = avr::uart::software_rx_polled<C, avr::pb0, 57600_Bd>;
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using tx_t = avr::uart::software_tx<C, avr::pb1, 57600_Bd>;
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// The compiled idle poll: sbis skipping the exit (2), sbiw + sbci +
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// sbci + brne (6).
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static constexpr std::uint8_t poll_cycles = 8;
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static void init()
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{
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avr::init<rx_t, tx_t>();
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}
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static bool pending()
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{
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return !avr::io::input<avr::pb0>::read(); // a start bit has begun
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}
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static std::uint8_t rx()
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{
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return rx_t::template read_blocking<off>();
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}
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static void tx(std::uint8_t byte)
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{
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tx_t::template write<off>(byte);
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}
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static void drain()
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{
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// The software transmitter returns only after the stop bit.
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}
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};
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using link = std::conditional_t<avr::hw::db.has_reg("UDR0"), hardware_link<dev::clock>, software_link<dev::clock>>;
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// The application's entry, an absolute address the linker pins (--defsym in
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// CMakeLists.txt): 0x0000 on the mega (word 0 stays the application's own
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// vector — BOOTRST re-vectors a reset into the loader in hardware) and the
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// trampoline word at base - 2 on the tinies. Reaching it must not depend on
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// where this copy runs, so the jump goes through a pointer: [[gnu::noipa]]
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// keeps the constant from folding back into a PC-relative call.
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extern "C" [[noreturn]] void pureboot_app();
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[[gnu::noipa, noreturn]] void jump(void (*target)())
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{
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target();
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__builtin_unreachable();
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}
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[[gnu::noinline, noreturn]] void run_app()
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{
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jump(pureboot_app);
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}
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// One activation window is a single 32-bit poll countdown. The divisor is
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// the backend's counted poll-loop cycles (its own comment reads them off the
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// compiled loop); whole-second precision is all the window promises, so the
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// nearest cycle count is plenty.
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consteval std::uint32_t window_polls()
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{
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return timeout_seconds * static_cast<std::uint32_t>(dev::clock.hz / link::poll_cycles);
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}
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bool pending_before_deadline()
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{
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std::uint32_t polls = window_polls();
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do {
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if (link::pending())
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return true;
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} while (--polls);
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return false;
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}
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// A knock byte under the activation deadline: an idle line means no host is
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// there, and the application runs.
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std::uint8_t rx_deadline()
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{
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if (!pending_before_deadline())
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run_app();
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return link::rx();
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}
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std::uint16_t rx16()
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{
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std::uint16_t low = link::rx();
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return static_cast<std::uint16_t>(low | (link::rx() << 8));
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}
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const std::uint8_t *flash_ptr(std::uint16_t address)
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{
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return reinterpret_cast<const std::uint8_t *>(address);
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}
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// The streamers take the count in the wire's 8-bit form: 0 means 256.
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// send_flash stays out of line: its two callers ('b' and 'R') otherwise each
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// inline a private copy of the loop.
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[[gnu::noinline]] void send_flash(std::uint16_t address, std::uint8_t count)
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{
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do
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link::tx(avr::flash_load(flash_ptr(address++)));
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while (--count);
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}
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void send_eeprom(std::uint16_t address, std::uint8_t count)
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{
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do
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link::tx(ee::read(address++));
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while (--count);
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}
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// EEPROM write, host-paced: each ack goes out once the byte's write has
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// begun, so the next byte arrives while it completes and the following
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// write's own ready-wait sees an idle line. Nothing is ever missed, on
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// either serial backend, without a buffer.
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void store_eeprom(std::uint16_t address, std::uint8_t count)
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{
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do {
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ee::write<off>(address++, link::rx());
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link::tx(ack);
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} while (--count);
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}
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// One flash page: stream the bytes into the SPM buffer as little-endian
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// words, then erase and program — except the 512-byte slot this code runs
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// in, which is drained but never programmed, so a copy can never erase
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// itself. `slot_high` is the high byte of that running slot's base (run()
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// derives it); a broken host thus cannot brick the running loader, and a
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// copy flashed one slot lower may rewrite the slot above it — how pureboot
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// updates itself. On the mega the RWW section is re-enabled so reads work
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// immediately.
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void program_flash(std::uint16_t address, std::uint8_t slot_high)
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{
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// A buffer word cannot be loaded twice without an erase (§26.2.1), so a
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// refused page's drained data must not linger for the next write:
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// discard the buffer up front — CTPB on the tinies; on the mega writing
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// RWWSRE aborts a pending load (§26.2.2).
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if constexpr (boot_section)
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spm::rww_enable<off>();
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else
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spm::clear_buffer<off>();
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// The address is the loop's only state: pages are aligned, so the walk
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// ends when the offset bits wrap back to zero.
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do {
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std::uint8_t low = link::rx();
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std::uint8_t high = link::rx();
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spm::fill<off>(address, static_cast<std::uint16_t>(low | (high << 8)));
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address += 2;
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} while (static_cast<std::uint8_t>(address) & (page - 1));
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address -= 2; // back inside the page — erase and write ignore the word bits
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const std::uint8_t page_high = static_cast<std::uint8_t>(address >> 8) & 0xfe;
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if (page_high != slot_high) {
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// The tinies halt the CPU through the erase and the write, so only
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// the mega — running on while its RWW section programs — waits.
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spm::erase_page<off>(address);
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if constexpr (boot_section)
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spm::wait();
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spm::write_page<off>(address);
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if constexpr (boot_section) {
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spm::wait();
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spm::rww_enable<off>();
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}
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}
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}
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// The four fuse/lock bytes in the hardware's own Z order: low, lock,
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// extended, high. Writing fuses is not a thing self-programming can do on
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// AVR — SPM reaches flash (and boot lock bits) only.
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void send_fuses()
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{
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std::uint8_t which = 0;
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do
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link::tx(spm::read_fuse<off>(static_cast<spm::fuse>(which)));
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while (++which & 3);
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}
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[[noreturn]] void run()
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{
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// A watchdog reset belongs to the application (whose watchdog stays
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// forced on until it clears WDRF) — no activation window in its way.
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if (avr::hw::mcusr::wdrf.test())
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run_app();
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link::init();
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// The high byte of the 512-byte-aligned base this copy runs at: the word
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// return address's high byte is the byte address >> 9 (the slot index),
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// doubled back into address terms. program_flash refuses this one slot
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// and the info block is addressed from it, so both follow wherever the
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// code was flashed.
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const std::uint8_t slot_high =
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static_cast<std::uint8_t>((reinterpret_cast<std::uint16_t>(__builtin_return_address(0)) >> 8) << 1);
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// The knock: 'p' then 'b', each under a fresh window; any other byte is
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// line noise and waits again. Falling out of a window runs the app.
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while (rx_deadline() != 'p' || rx_deadline() != 'b') {
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}
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for (;;) {
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// No prompt while an EEPROM write runs: a pending write blocks SPM
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// and fuse reads (§26.2.1), and the ack tells the host all is done.
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ee::wait();
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link::tx(ack);
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const std::uint8_t command = link::rx();
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switch (command) {
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case 'b': { // info block, read relative to the running slot
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// The block sits in the image's first 256 bytes (the build lint
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// asserts it), and slots are 512-aligned — so the low byte of its
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// link address is its offset in any slot, and the high byte of
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// its runtime address is the running slot's. Built as a byte
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// pair so no absolute 16-bit address is ever materialized.
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const std::uint8_t low = static_cast<std::uint8_t>(reinterpret_cast<std::uint16_t>(info::storage.data()));
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send_flash(std::bit_cast<std::uint16_t>(std::array{low, slot_high}), info::size());
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break;
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}
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case 'J': { // jump to a wire word address: hand-over and staging transfer
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auto target = reinterpret_cast<void (*)()>(rx16());
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link::tx(ack);
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link::drain();
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jump(target);
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}
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case 'R': // read flash: addr16, n8 (0 = 256)
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case 'r': // read EEPROM: addr16, n8
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case 'w': { // write EEPROM: addr16, n8, then n bytes each acked
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std::uint16_t address = rx16();
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std::uint8_t count = link::rx();
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if (command == 'R')
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send_flash(address, count);
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else if (command == 'r')
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send_eeprom(address, count);
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else
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store_eeprom(address, count);
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break;
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}
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case 'W': // program one flash page: addr16, page bytes
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program_flash(rx16(), slot_high);
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break;
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case 'F': // fuse and lock bytes
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send_fuses();
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break;
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default: // unknown bytes are ignored; the loop re-acks
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break;
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}
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}
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}
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} // namespace
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} // namespace pureboot
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template struct avr::startup::entry<pureboot::run>;
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