BlackMark
04c04abe3e
The Seed Robotics native-UART fixed-baud TinySafeBoot (GPLv3), reference only — not built. Assembles to 500 B with the full feature set, proving ≤512 B and full feature parity are simultaneously reachable. Also drops the stale empty stk500v2/ leftover. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
777 lines
30 KiB
NASM
777 lines
30 KiB
NASM
;***********************************************************************
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;***********************************************************************
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;***********************************************************************
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; TinySafeBoot - The Universal Bootloader for AVR ATmegas
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;***********************************************************************
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;***********************************************************************
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;***********************************************************************
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;
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;-----------------------------------------------------------------------
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; 2020 - Version using native UART, Fixed Baud by Seed Robotics in 2020
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;-----------------------------------------------------------------------
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; meant for use on ATMEGA devices only (with native UART - UART0)
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;
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; Main differences to Regular TSB Bootloader:
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; - Uses a native UART (UART0); therefore not compatible with ATTINY
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; - Baud rate is fixed (set by a macro in the code). No auto bauding.
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; - Disables TX while not transmitting to allow for one wire flashing
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; (where RX and TX are shorted, for a multi drop bus)
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; - Also works with separate RX and TX; however an external pull up
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; on TX _may_ be required; alternatively you can modify the code
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; in the ReceiveByte routine so that it won't disable TX.
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; - FIXES:
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; - situations where booting onto a bus with active communication could
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; lock the autobauding feature
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; - times out and boots to application code if the host stops interacting
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; with the bootloader
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;
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;-----------------------------------------------------------------------
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; Extended by Seed Robotics from 2017
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;-----------------------------------------------------------------------
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; Seed Robotics contributions are available from the Github
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; repository github.com/seedrobotics
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; The License and conditions remain as stated below, in the
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; original notice.
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;
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;
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;-----------------------------------------------------------------------
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; Written in 2011-2015 by Julien Thomas
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;
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; This program is free software; you can redistribute it and/or
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; modify it under the terms of the GNU General Public License
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; as published by the Free Software Foundation; either version 3
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; of the License, or (at your option) any later version.
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty
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; of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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; See the GNU General Public License for more details.
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, see:
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; http://www.gnu.org/licenses/
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;-----------------------------------------------------------------------
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;
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;
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;
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;***********************************************************************
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; OVERVIEW
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;***********************************************************************
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;
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; TSB assembly source is organized in 4 segments (approx. line numbers)
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;
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; ~ 50 ... Global definitions
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; ~ ... TSB for ATmegas
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;
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;***********************************************************************
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; ADJUSTMENTS FOR INDIVIDUAL ASSEMBLY
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;***********************************************************************
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;
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; This Sourcecode is directly compatible to: AVRASM2, GAVRASM
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;
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.nolist
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;
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;-----------------------------------------------------------------------
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; SPECIFY TARGET AVR
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;-----------------------------------------------------------------------
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;
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; Comment in and provide def.inc file for target device
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;
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; [Examples]
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;
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;.include "tn2313def.inc"
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;.include "tn85def.inc"
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;.include "m8515def.inc"
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;.include "m168def.inc"
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;.include "m161def.inc"
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;.include "m324Adef.inc"
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;.include "m328Pdef.inc"
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;.include "tn441def.inc"
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;.include "tn167def.inc"
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;.include "tn861def.inc"
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;.include "tn841def.inc"
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;.include "tn84def.inc"
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;.include "m8def.inc"
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;.include "m644PAdef.inc"
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;.include "m644def.inc"
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;.include "tn167def.inc"
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;.include "tn25def.inc"
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;
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; [...]
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;
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;
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.list
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;
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;-----------------------------------------------------------------------
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; BUILD INFO
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;-----------------------------------------------------------------------
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; YY = Year - MM = Month - DD = Day
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.set YY = 21
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.set MM = 12
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.set DD = 21
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;
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.set BUILDSTATE = $F3 ; F1 fixed baud, pull up, derived from original (modified for fixed baud)
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; F2 fixed baud, pull up, guaranteed minimum activation timeout in case of userpage data corruption
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; F3 adds a CONSTANT with clock speed (Mhz) as word in the last page of memory (clock speed our defined CONSTANT)
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;
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;-----------------------------------------------------------------------
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; TSB / TSB-INSTALLER SWITCH
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;-----------------------------------------------------------------------
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; 0 = Regular assembly to target address
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; Other value = NOT SUPPORTED
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;
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.set TSBINSTALLER = 0
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;
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;-----------------------------------------------------------------------
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; F_CPU and Baud rate setting
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;-----------------------------------------------------------------------
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.equ F_CPU = 20000000
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.equ BAUD = 33333 ; baudrate (notice some possible wrong cals: example for 56K, it is actually 55,555, so for BAUD_PRESC give an INT result of 8, we must set BAUD to 55500)
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.equ BAUD_PRESCx10 = (F_CPU * 10/16/BAUD) - 10 ; baud prescale (regular formula = F_CPU * 10/16/BAUD - 1 but we do it x10 to check the rounding)
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; arredondar acima se necesssario
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.if BAUD_PRESCx10 - ( (BAUD_PRESCx10 / 10) * 10 ) >= 5 ; calculate the remainder: we rely on the fact these are integer divisions. Therefore, dividing by 10, rounds DOWN in integer division
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.equ BAUD_PRESC = (F_CPU/16/BAUD)
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.warning "Incrementing default BAUD_PRESC formula by 1 due to rounding."
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.else
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.equ BAUD_PRESC = (F_CPU/16/BAUD) - 1
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.warning "Using default BAUD_PRESC formula (no rounding up)"
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.endif
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.if BAUD_PRESC > 255
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.error "ERROR: BAUD RATE TOO LOW. WE ONLY WRITE THE UBRRL REGISTER, SO UBRR MUST BE <255 FOR THIS CLOCK FREQ AND BAUD"
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.endif
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;***********************************************************************
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; AUTO-ADJUST FOR DIFFERENT ASSEMBLY OPTIONS
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;***********************************************************************
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;
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; Always set TINYMEGA=1 bc this code only supports ATMEGA
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.equ TINYMEGA=1
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.if FLASHEND > ($7fff)
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.error "SORRY! DEVICES OVER 64 KB NOT SUPPORTED YET."
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.exit
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.endif
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;-----------------------------------------------------------------------
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; Workarounds for devices with renamed or missing definitions
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;-----------------------------------------------------------------------
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;
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.ifndef SPMCSR ; SPMEN / PGERS / ...
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.equ SPMCSR = SPMCR
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.endif
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.ifndef MCUSR ; PORF / EXTRF / BORF / WDRF
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.equ MCUSR = MCUCSR
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.endif
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; Detect Attiny441/841 to amend missing pagesize and apply 4-page mode
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.set FOURPAGES = 0
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.if ((SIGNATURE_000 == $1E) && (SIGNATURE_002 == $15) && (SIGNATURE_001 == $92))
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.equ PAGESIZE = 32
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.set FOURPAGES = 1
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.message "ATTINY441: 4-PAGE-ERASE MODE"
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.endif
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.if ((SIGNATURE_000 == $1E) && (SIGNATURE_002 == $15) && (SIGNATURE_001 == $93))
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.equ PAGESIZE = 32
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.set FOURPAGES = 1
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.message "ATTINY841: 4-PAGE-ERASE MODE"
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.endif
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;-----------------------------------------------------------------------
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; Universal Constants and Registers
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;-----------------------------------------------------------------------
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.equ REQUEST = '?' ; request / answer / go on
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.equ CONFIRM = '!' ; confirm / attention
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; Current bootloader date coded into 16-bit number
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.equ BUILDDATE = YY * 512 + MM * 32 + DD
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; Other
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.equ INFOLEN = 8 ; *Words* of Device Info
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.equ BUFFER = SRAM_START
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; Registers (in use by TSB-Firmware and TSB-Installer for ATtinys)
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.def avecl = r4 ; application vector temp low
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.def avech = r5 ; application vector temp high
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.def tmp1 = r16 ; these are
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.def tmp2 = r17 ; universal
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.def tmp3 = r18 ; temporary
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.def tmp4 = r19 ; registers
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.def bcnt = r20 ; page bytecounter
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.def cntr1 = r21 ; timeout counter
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.def rxen = r22 ; check if RX enabled (meaning TX disabled)
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.def utimeoutH = r23 ; user timeout High byte
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; special purpose registers start at R26
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;
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;
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;***********************************************************************
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;***********************************************************************
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;***********************************************************************
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; START OF TSB FOR ATMEGAS
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;***********************************************************************
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;***********************************************************************
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;***********************************************************************
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;
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; TSB for ATmegas is always coded directly to target address.
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.if TINYMEGA == 1
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.message "ASSEMBLY OF TSB FOR ATMEGA"
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.equ BOOTSTART = (FLASHEND+1)-256 ; = 512 Bytes
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.equ LASTPAGE = BOOTSTART - PAGESIZE ; = 1 page below TSB!
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.org BOOTSTART
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RESET:
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cli
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in tmp4, MCUSR ; check reset condition
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sbrc tmp4, WDRF ; in case of a Watchdog reset
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rjmp APPJUMP ; immediately leave TSB
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ldi tmp1, low (RAMEND) ; write ramend low
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out SPL, tmp1 ; into SPL (stackpointer low)
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.ifdef SPH
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ldi tmp1, high(RAMEND) ; write ramend high for ATtinys
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out SPH, tmp1 ; with SRAM > 256 bytes
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.message "PROVIDING FOR STACK BIGGER THAN 256 BYTES"
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.endif
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.ifndef DDRD2
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.equ DDRD2 = DDD2
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.endif
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;-----------------------------------------------------------------------
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; ACTIVATION CHECK
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;-----------------------------------------------------------------------
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; Configure UART; no autobauding in this version
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ldi tmp1,BAUD_PRESC ; load baud prescale
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sts UBRR0L,tmp1 ; set baud prescale
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; ldi tmp2,HIGH(bpsc) ; save code by not loading UBBRH
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;sts UBRRH,tmp2 ; to UBRR0
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;ldi tmp2,( (1<<RXEN0) ) ; enable transmiter and receiver
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;sts UCSR0B,tmp2
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; Enable Pull up on Port D2 (PD2)
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cbi DDRD, DDRD2
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sbi PORTD, PORTD2
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; we will enable RNEN/TXEN in the ReceiveByte and TransmitByte routines
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rcall ZtoLASTPAGE ; set Z to start'o'LASTPAGE
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adiw zl, 2 ; skip first 2 bytes (APPJUMP)
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lpm utimeoutH, z+ ; load TIMEOUT byte and store for use in RX byte timeout
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ori utimeoutH, (F_CPU / 1000000); prevent bootloader lockout due if it gets an invalid (to small) timeout setting
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; this ensures value is at least the clock rate, which shoudl give about 40ms
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clr tmp2 ; apparently at times this is not set to 0 on boot? (seen while in debugWire)
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clr rxen ; same as above
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WRX1To:
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; we'll check the X register which is where ReceibeByte controls the timeout
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; the overall timeout of receive byte is the timeout set by the user
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; therefore, if we get characters while X> 0 we're attempting to activate bootloader;
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; if not, if X=0 we timedout and go to app start
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rcall ReceiveByte
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brcs WRX2To ; if X got to 0 (i.e. carry set), assume we timed out
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cpi tmp1, '@' ; did we get an activation char = "@"
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breq ActCharRcvd
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WRX2To:
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rjmp APPJUMP ; not an activation char goto APPJUMP in LASTPAGE
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ActCharRcvd:
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inc tmp2
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cpi tmp2, 3
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brne WRX1To ; branch if not yet at 3;
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; otherwise fall through to password check
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;-----------------------------------------------------------------------
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; CHECK PASSWORD / EMERGENCY ERASE
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;-----------------------------------------------------------------------
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; we use the user timeout (utimeoutH) register for COMM timeout
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; when we don't get valid data
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; increase this value to a fixed one now, to cope
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; with cases where the user timeout is set so low that we don't have time to
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; do anything
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ldi utimeoutH, (F_CPU / 78500) ; this should result in 255 for 20Mhz and proportionally
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; less for lower Clocks, so that we get the same time approx. 2.4sec
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CheckPassword:
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chpw0: ser tmp4 ; tmp4 = 255 enables comparison
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chpw1: lpm tmp3, z+ ; load pw character from Z
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and tmp3, tmp4 ; if tmp4 = 0 disables comparison, for wrong password scenarios
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cpi tmp3, 255 ; byte value 255 indicates
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breq chpwx ; end of password -> success
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chpw2: rcall Receivebyte ; else receive next character
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cpi tmp1, 0 ; rxbyte = 0 will branch
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breq chpwee ; to confirm emergency erase
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cp tmp1, tmp3 ; compare password with rxbyte
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breq chpw0 ; if equal check next character
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clr tmp4 ; tmp4 = 0 to loop forever
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rjmp chpw1 ; and smoothen power profile
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chpwee:
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; Fix for ISSUE #1: only check for Emergency Erase if we haven't
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; gotten a wrong password; if we got a wrong password
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; then we should stay in loop and not escape to Emergency
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; Erase
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cpi tmp4, 0 ; if tmp4=0 we are set to loop forever
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breq chpw1
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rcall RequestConfirm ; request confirm
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brts chpa ; not confirmed, leave
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rcall RequestConfirm ; request 2nd confirm
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brts chpa ; can't be mistake now
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rcall EmergencyErase ; go, emergency erase!
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rjmp Mainloop
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chpa:
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rjmp APPJUMP ; start application
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chpwx:
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; rjmp SendDeviceInfo ; go on to SendDeviceInfo
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;-----------------------------------------------------------------------
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; SEND DEVICEINFO
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;-----------------------------------------------------------------------
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SendDeviceInfo:
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ldi zl, low (DEVICEINFO*2) ; load address of deviceinfo
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ldi zh, high(DEVICEINFO*2) ; low and highbyte
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ldi bcnt, INFOLEN*2
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rcall SendFromFlash
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;-----------------------------------------------------------------------
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; MAIN LOOP TO RECEIVE AND EXECUTE COMMANDS
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;-----------------------------------------------------------------------
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Mainloop:
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clr zl ; clear Z pointer
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clr zh ; which is frequently used
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rcall SendConfirm ; send CONFIRM via RS232
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rcall Receivebyte ; receive command via RS232
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rcall CheckCommands ; check command letter
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rjmp Mainloop ; and loop on
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;-----------------------------------------------------------------------
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; CHANGE USER DATA IN LASTPAGE
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;-----------------------------------------------------------------------
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ChangeSettings:
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rcall GetNewPage ; get new LASTPAGE contents
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brtc ChangeS0 ; from Host (if confirmed)
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ret
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ChangeS0:
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rcall ZtoLASTPAGE ; re-write LASTPAGE
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rcall EraseFlashPage
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rcall WritePage ; erase and write LASTPAGE
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;-----------------------------------------------------------------------
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; SEND USER DATA FROM LASTPAGE
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;-----------------------------------------------------------------------
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ControlSettings:
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rcall ZtoLASTPAGE ; point to LASTPAGE
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; rcall SendPageFromFlash
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;-----------------------------------------------------------------------
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; SEND DATA FROM FLASH MEMORY
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;-----------------------------------------------------------------------
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SendPageFromFlash:
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ldi bcnt, low (PAGESIZE*2) ; whole Page to send
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SendFromFlash:
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rcall SPMwait ; (re)enable RWW read access
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lpm tmp1, z+ ; read directly from flash
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rcall Transmitbyte ; and send out to RS232
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dec bcnt ; bcnt is number of bytes
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brne SendFromFlash
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ret
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;-----------------------------------------------------------------------
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; READ APPLICATION FLASH
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;-----------------------------------------------------------------------
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; read and transmit application flash area (pagewise)
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ReadAppFlash:
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RAF0:
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rcall RwaitConfirm
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brts RAFx
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rcall SendPageFromFlash
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RAF1:
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cpi zl, low (LASTPAGE*2) ; count up to last byte
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brne RAF0 ; below LASTPAGE
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cpi zh, high(LASTPAGE*2)
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brne RAF0
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RAFx:
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ret
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;-----------------------------------------------------------------------
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; WRITE APPLICATION FLASH
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;-----------------------------------------------------------------------
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; Write Appflash pagewise, don't modify anything for ATmegas
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WriteAppFlash:
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rcall EraseAppFlash ; Erase whole app flash
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Flash2:
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rcall GetNewPage ; get next page from host
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brts FlashX ; stop on user's behalf
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Flash3:
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rcall WritePage ; write page data into flash
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Flash4:
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cpi zh, high(LASTPAGE*2-1) ; end of available Appflash?
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brne Flash2 ; if Z reached last location
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cpi zl, low (LASTPAGE*2-1) ; then we are finished
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brne Flash2 ; else go on
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FlashX:
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ret ; we're already finished!
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;-----------------------------------------------------------------------
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; WRITE FLASH PAGE FROM BUFFER, VERIFYING AND VERIFY-ERROR-HANDLING
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;-----------------------------------------------------------------------
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WritePage:
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rcall YtoBUFFER ; Y=BUFFER, bcnt=PAGESIZE*2
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WrPa1:
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ld r0, y+ ; fill R0/R1 with word
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ld r1, y+ ; from buffer position Y / Y+1
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ldi tmp1, 0b00000001 ; set only SPMEN in SPMCSR
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out SPMCSR, tmp1 ; to activate page buffering
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spm ; store word in page buffer
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adiw zl, 2 ; and forward to next word
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subi bcnt, 2
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brne WrPa1
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; Z = start of next page now
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subi zl, low (PAGESIZE*2) ; point back Z to
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sbci zh, high(PAGESIZE*2) ; start of current page
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; Z = back on current page's start
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WrPa2:
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ldi tmp1, 0b00000101 ; enable PRWRT + SPMEN
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out SPMCSR, tmp1 ; in SPMCSR
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spm ; write whole page to flash
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WrPa3:
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in tmp1, SPMCSR ; wait for flash write finished
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sbrc tmp1, 0 ; skip if SPMEN (bit0) cleared
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rjmp WrPa3 ; ITS BEEN WRITTEN
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subi zl, low (-PAGESIZE*2) ; same effect as
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sbci zh, high(-PAGESIZE*2) ; Z = Z + PAGESIZE*2
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ret
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;-----------------------------------------------------------------------
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; CHECK COMMANDS
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;-----------------------------------------------------------------------
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CheckCommands:
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cpi tmp1, 'c' ; read LASTPAGE
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breq ControlSettings
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cpi tmp1, 'C' ; write LASTPAGE
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breq ChangeSettings
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cpi tmp1, 'f' ; read Appflash
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breq ReadAppFlash
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cpi tmp1, 'F' ; write Appflash
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breq WriteAppFlash
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cpi tmp1, 'e' ; read EEPROM
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breq EepromRead
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cpi tmp1, 'E' ; write EEPROM
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breq EEpromWrite
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rjmp APPJUMP ; else start application
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;-----------------------------------------------------------------------
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; EEPROM READ/WRITE ACCESS
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;-----------------------------------------------------------------------
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EepromWrite:
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EEWr0:
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rcall GetNewPage ; get EEPROM datablock
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brts EERWFx ; or abort on host's demand
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EEWr1:
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rcall YtoBUFFER ; Y = Buffer and Bcnt = blocksize
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EEWr2:
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ld tmp1, y+ ; read EEPROM byte from buffer
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rcall EEWriteByte
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|
dec bcnt ; count down block byte counter
|
|
brne EEWr2 ; loop on if block not finished
|
|
rjmp EeWr0
|
|
|
|
;-----------------------------------------------------------------------
|
|
|
|
EEpromRead:
|
|
EeRe1:
|
|
rcall RwaitConfirm ; wait to confirm
|
|
brts EERWFx ; else we are finished
|
|
ldi bcnt, low(PAGESIZE*2) ; again PAGESIZE*2 is blocksize
|
|
EERe2:
|
|
out EEARL, zl ; current EEPROM address low
|
|
.ifdef EEARH
|
|
out EEARH, zh ; current EEPROM address high
|
|
.endif
|
|
sbi EECR, 0 ; set EERE - EEPROM read enable
|
|
in tmp1, EEDR ; read byte from current address
|
|
rcall Transmitbyte ; send out to RS232
|
|
adiw zl,1 ; count up EEPROM address
|
|
dec bcnt ; count down block byte counter
|
|
brne EERe2 ; loop on if block not finished
|
|
rjmp EERe1
|
|
EERWFx:
|
|
ret
|
|
|
|
;-----------------------------------------------------------------------
|
|
|
|
EEWriteByte:
|
|
out EEDR, tmp1 ; write to EEPROM data register
|
|
out EEARL, zl ; current EEPROM address low
|
|
.ifdef EEARH
|
|
out EEARH, zh ; high EEARH for some attinys
|
|
.endif
|
|
sbi EECR, 2 ; EEPROM master prog enable
|
|
sbi EECR, 1 ; EEPE initiate prog cycle
|
|
EeWB:
|
|
sbic EECR, 1 ; wait write cycle to complete
|
|
rjmp EeWB ; before we can go on
|
|
adiw zl,1 ; count up EEPROM address
|
|
ret
|
|
|
|
;-----------------------------------------------------------------------
|
|
; GET NEW PAGE
|
|
;-----------------------------------------------------------------------
|
|
|
|
GetNewPage:
|
|
rcall RequestConfirm ; check for Confirm
|
|
brts GNPx ; abort if not confirmed
|
|
GNP0:
|
|
rcall YtoBUFFER ; Y = BUFFER, bcnt = PAGESIZE*2
|
|
GNP1:
|
|
rcall ReceiveByte ; receive serial byte
|
|
st y+, tmp1 ; and store in buffer
|
|
dec bcnt ; until full page loaded
|
|
brne GNP1 ; loop on
|
|
GNPx:
|
|
ret ; finished
|
|
;-----------------------------------------------------------------------
|
|
; REQUEST TO CONFIRM / AWAIT CONFIRM COMMAND
|
|
;-----------------------------------------------------------------------
|
|
|
|
RequestConfirm:
|
|
ldi tmp1, REQUEST ; send request character
|
|
rcall Transmitbyte ; prompt to confirm (or not)
|
|
|
|
RwaitConfirm:
|
|
rcall ReceiveByte ; get host's reply
|
|
clt ; set T=0 for confirmation
|
|
cpi tmp1, CONFIRM ; if host HAS sent CONFIRM
|
|
breq RCx ; return with the T=0
|
|
set ; else set T=1 (NOT CONFIRMED)
|
|
RCx:
|
|
ret ; whether confirmed or not
|
|
|
|
;-----------------------------------------------------------------------
|
|
; FLASH ERASE TOP-TO-BOTTOM ( (BOOTSTART-1) ... $0000)
|
|
;-----------------------------------------------------------------------
|
|
|
|
EraseAppFlash:
|
|
rcall ZtoLASTPAGE ; point Z to LASTPAGE, directly
|
|
EAF0:
|
|
subi zl, low (PAGESIZE*2)
|
|
sbci zh, high(PAGESIZE*2)
|
|
rcall EraseFlashPage
|
|
brne EAF0 ; until first page reached
|
|
EAFx: ret ; and leave with Z = $0000
|
|
|
|
;-----------------------------------------------------------------------
|
|
; EMERGENCY ERASE OF FLASH / EEPROM / USERDATA
|
|
;-----------------------------------------------------------------------
|
|
|
|
EmergencyErase:
|
|
rcall EraseAppFlash ; erase Application Flash
|
|
ser tmp1 ; byte value for EEPROM writes
|
|
EEE0:
|
|
rcall EEWriteByte ; write EEPROM byte, Z = Z + 1
|
|
cpi zh, high(EEPROMEND+1)+2 ; EEPROMEND
|
|
brne EEE0 ; and loop on until finished
|
|
|
|
rcall ZtoLASTPAGE ; LASTPAGE is to be erased
|
|
; rcall EraseFlashPage
|
|
|
|
;-----------------------------------------------------------------------
|
|
; ERASE ONE FLASH PAGE
|
|
;-----------------------------------------------------------------------
|
|
|
|
EraseFlashPage:
|
|
ldi tmp1, 0b00000011 ; enable PGERS + SPMEN
|
|
out SPMCSR, tmp1 ; in SPMCSR and erase current
|
|
spm ; page by SPM (MCU halted)
|
|
|
|
; Waiting for SPM to be finished is *obligatory* on ATmegas!
|
|
SPMwait:
|
|
in tmp1, SPMCSR
|
|
sbrc tmp1, 0 ; wait previous SPMEN
|
|
rjmp SPMwait
|
|
ldi tmp1, 0b00010001 ; set RWWSRE and SPMEN
|
|
out SPMCSR, tmp1
|
|
spm
|
|
ret
|
|
|
|
;-----------------------------------------------------------------------
|
|
; OTHER SUBROUTINES
|
|
;-----------------------------------------------------------------------
|
|
|
|
YtoBUFFER:
|
|
ldi yl, low (BUFFER) ; reset pointer
|
|
ldi yh, high(BUFFER) ; to programming buffer
|
|
ldi bcnt, low(PAGESIZE*2) ; and often needed
|
|
ret
|
|
|
|
;-----------------------------------------------------------------------
|
|
|
|
ZtoLASTPAGE:
|
|
ldi zl, low (LASTPAGE*2) ; reset Z to LASTPAGE start
|
|
ldi zh, high(LASTPAGE*2)
|
|
ret
|
|
|
|
;-----------------------------------------------------------------------
|
|
; RS232 RECEIVE BYTE
|
|
;-----------------------------------------------------------------------
|
|
|
|
; uses: tmp1 (received data byte), cntr1 (for timeout)
|
|
; also uses utimeoutH which holds the default timeout defined by the user
|
|
; and X which is actually used to count down
|
|
SetRX:
|
|
ldi tmp1,(1<<RXEN0) ; enable receiver (Transmitter disabled)
|
|
sts UCSR0B,tmp1
|
|
ser rxen
|
|
|
|
ReceiveByte:
|
|
sbrs rxen, 0
|
|
rjmp SetRX
|
|
|
|
; outer counter
|
|
mov xh, utimeoutH
|
|
;ldi xl, 128
|
|
|
|
ReceiveByteShortTimeout:
|
|
ser cntr1 ; inner counter reset
|
|
|
|
ReceiveByteShortTimeout1:
|
|
lds tmp1, UCSR0A ; load UART status register A
|
|
sbrc tmp1, RXC0 ; if not RXComplete, skip
|
|
rjmp LoadRXByte
|
|
dec cntr1 ; if counter not zero
|
|
brne ReceiveByteShortTimeout1 ; cycle again; else fall through
|
|
sbiw xl, 1 ; dec outter counter
|
|
brcc ReceiveByteShortTimeout ; continue of outter counetr still active
|
|
;ret ;
|
|
|
|
LoadRXByte:
|
|
lds tmp1, UDR0 ; load received character even if RXC is not set
|
|
ret ; (it loads 0 and UDR FIFO should recover for next char)
|
|
|
|
;-----------------------------------------------------------------------
|
|
; RS232 SEND CONFIRM CHARACTER
|
|
;-----------------------------------------------------------------------
|
|
|
|
SendConfirm:
|
|
ldi tmp1, CONFIRM
|
|
rjmp Transmitbyte
|
|
|
|
;-----------------------------------------------------------------------
|
|
; RS232 TRANSMIT BYTE
|
|
;-----------------------------------------------------------------------
|
|
; uses: tmp1 (transmit byte will be shifted out), tmp2 (bitcounter)
|
|
;
|
|
|
|
SetTX:
|
|
ldi tmp2,(1<<TXEN0) ; enable transmitter (Receiver disabled)
|
|
sts UCSR0B,tmp2
|
|
clr rxen
|
|
|
|
; wait some guard time to allow receiving devices ot transition
|
|
; from TX t RX state
|
|
ser cntr1 ; inner counter reset
|
|
SetTXShortTimeout:
|
|
nop
|
|
dec cntr1 ; if counter not zero
|
|
brne SetTXShortTimeout ; cycle again; else fall through
|
|
|
|
|
|
TransmitByte:
|
|
sbrc rxen, 0
|
|
rjmp SetTX
|
|
|
|
; no need to wait for UDRE bc we will wait for TXC on
|
|
; every char transmitted. TXC occurs later that UDRE
|
|
; so UDRE should be asserted when TXC asserts
|
|
sts UDR0, tmp1
|
|
|
|
WaitForTXC:
|
|
lds tmp2, UCSR0A ; wait for TXC (and not UDRE)
|
|
sbrs tmp2, TXC0 ; bc after this char we may transition
|
|
rjmp WaitForTXC ; to receiving chars and we want to make sure we get a clean transition
|
|
; we need to write a 1 to clear the TXC flag; otherwise the flag won't clear
|
|
sts UCSR0A, tmp2 ; tmp2 should contain an asserted TXC bit
|
|
ret
|
|
|
|
|
|
;-----------------------------------------------------------------------
|
|
; ATMEGA APPJUMP = SIMPLE JUMP TO $0000 (ORIGINAL RESET VECTOR)
|
|
;-----------------------------------------------------------------------
|
|
; Boot Reset Vector (BOOTRST) must be activated for TSB on ATmegas.
|
|
; After timeout or executing commands, TSB for ATmegas will simply
|
|
; handover to the App by a (relative or absolute) jump to $0000.
|
|
|
|
APPJUMP:
|
|
rcall SPMwait ; make sure everything's done
|
|
|
|
.if FLASHEND >= ($1fff)
|
|
jmp $0000 ; absolute jump
|
|
.else
|
|
rjmp $0000 ; relative jump
|
|
.endif
|
|
|
|
|
|
DEVICEINFO:
|
|
.message "DEVICE INFO BLOCK FOR ATMEGA"
|
|
.db "TSB", low (BUILDDATE), high (BUILDDATE), BUILDSTATE
|
|
.db SIGNATURE_000, SIGNATURE_001, SIGNATURE_002, low (PAGESIZE)
|
|
.dw BOOTSTART-PAGESIZE
|
|
.dw EEPROMEND
|
|
.db $AA, $AA
|
|
|
|
|
|
;-----------------------------------------------------------------------
|
|
; DEVICE INFO BLOCK = PERMANENT DATA
|
|
;-----------------------------------------------------------------------
|
|
|
|
; set last word with the clock speed
|
|
.org FLASHEND
|
|
.dw (F_CPU/1000000)
|
|
|
|
//.message "SAVING CLOCK SPEED IN LAST BYTE AS " (F_CPU/1000000) " Mhz"
|
|
|
|
.message "ASSEMBLY OF TSB FOR ATMEGA SUCCESSFULLY FINISHED!"
|
|
|
|
.endif ; closing TSB for ATmega sourcecode;
|
|
|
|
;***********************************************************************
|
|
; END OF TSB FOR ATMEGAS
|
|
;***********************************************************************
|
|
|
|
.exit
|
|
|
|
;***********************************************************************
|
|
;***********************************************************************
|
|
;***********************************************************************
|
|
; END OF CONDITIONAL ASSEMBLY SOURCE OF TSB FOR ATTINYS AND ATMEGAS
|
|
;***********************************************************************
|
|
;***********************************************************************
|
|
;***********************************************************************
|
|
|
|
|