BlackMark
6594c1b044
Cancel the GPIO bridge's cycle timers with the state they drive: avr_reset drops the TX latch, whose falling edge starts a spurious decode before bridge_reset runs, and the stale sampler then interleaves with the loader's first real answer through the shared shift state — the first post-reset replies came back corrupted and the knock retries burned the activation window into the application. Wrap the mega's registered flash ioctl to re-dispatch page erases with Z masked to the page boundary: simavr's PGERS handler erases spm_pagesize bytes from Z & ~1 (its PGWRT path masks correctly), wiping the neighbouring page when Z sits past the page start, which hardware permits (§26.8.1). Model the write-once temporary buffer in the tiny NVM module — silicon refuses a second load per word until the buffer clears, and a last-write- wins model masks real firmware bugs. Optional arguments select the reset vector (the mega's fuse profiles) and a raw flash image to resume from (power-fail tests re-enter a dumped state). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>