avr/bootloader
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  • e7f6cd3ee8 pureboot: the pin axis, and the mute it was hiding main BlackMark 2026-07-24 22:08:56 +02:00
  • 0f00f6bdeb test: move the handshake regression in beside the rest BlackMark 2026-07-24 18:22:19 +02:00
  • 3990f53180 pureboot: take the running slot from avr::startup::caller_page BlackMark 2026-07-24 17:57:47 +02:00
  • 3899e8ef40 pureboot: release a USART left enabled on the software link's pins BlackMark 2026-07-24 17:22:48 +02:00
  • 0ddc65ca28 pureboot.py: bump the tool version to 5 BlackMark 2026-07-24 17:11:03 +02:00
  • 142de8775d pureboot.py: bound the activation drain against a flooding target BlackMark 2026-07-24 17:10:40 +02:00
  • a285347e5f pureboot 5: one command pair for every memory, and a clock-free backend autobaud BlackMark 2026-07-24 15:50:48 +02:00
  • 2cc540c6a1 pureboot: the unified autobaud loader, and the hang that settled the decision BlackMark 2026-07-24 00:48:54 +02:00
  • 14efef96cc pureboot: autobaud host support and simavr end-to-end for both variants BlackMark 2026-07-23 22:45:22 +02:00
  • eecf9673b9 pureboot: autobaud variant, two versions for review BlackMark 2026-07-23 22:15:38 +02:00
  • c78bf2841a docs: the watchdog-lockout and EEPROM-wrap gotchas BlackMark 2026-07-23 02:01:33 +02:00
  • f9eeae5069 pureboot: the info block reads as a table, one wire byte per line BlackMark 2026-07-23 01:19:09 +02:00
  • 01e0169ac5 style: clang-format the W-fix line BlackMark 2026-07-23 01:13:51 +02:00
  • 98a3be3c2e pureboot 4: the loader carries its fixes' identity BlackMark 2026-07-23 01:09:38 +02:00
  • 11707e0b06 pureboot: the info block is what proves a knock landed BlackMark 2026-07-22 23:49:37 +02:00
  • c763ca856a pureboot: W addresses a page, not a word in it BlackMark 2026-07-22 23:43:41 +02:00
  • a5b42bc02f test: the exhaustive clock x baud x backend size matrix BlackMark 2026-07-22 23:32:28 +02:00
  • 8f106b636d pureboot 3: a 512-byte slot on every chip, the 1284s included BlackMark 2026-07-22 19:02:59 +02:00
  • 6f3eb06233 pureboot: a version number for the loader, not for the protocol BlackMark 2026-07-22 17:19:27 +02:00
  • a39a3c7f46 docs: correct the size figures for the configured variants BlackMark 2026-07-22 17:08:24 +02:00
  • 862bc14e1e pureboot: no SPM buffer discard, the host repairs instead BlackMark 2026-07-22 16:29:27 +02:00
  • 52c3b6ca7f build: generated presets and a check entry point BlackMark 2026-07-21 23:42:57 +02:00
  • 9a528f9411 host: one fact per line, progress bars, --verbose BlackMark 2026-07-21 23:42:57 +02:00
  • a977e507f3 pureboot: every deployment axis is a build parameter BlackMark 2026-07-21 23:42:57 +02:00
  • 76f4576fe0 pureboot: a loader in the staging slot is the staging copy — leave it there BlackMark 2026-07-21 21:55:15 +02:00
  • 5f9e736d66 pureboot: artifact roles, wrong-chip refusal, and misplaced-loader re-homing BlackMark 2026-07-21 21:18:10 +02:00
  • 9cbe2d682d pureboot: every libavr chip — 37 loaders, the m48 class, the 644 geometry BlackMark 2026-07-21 18:53:04 +02:00
  • b7d082ff11 pureboot: correct the 1284P deployment profiles in the README BlackMark 2026-07-21 16:48:46 +02:00
  • 65f8fdd537 pureboot: the 1284P rides a 1 KiB slot — its own boot-sector minimum BlackMark 2026-07-21 13:54:40 +02:00
  • 0fa53e1cad pureboot: the classic megas and the word-addressed 1284P groundwork BlackMark 2026-07-21 12:00:19 +02:00
  • a1ff032c87 pureboot: take the device signature from the chip database BlackMark 2026-07-20 23:30:17 +02:00
  • f9b86393e1 build: emit a raw .bin beside the HEX for every loader image BlackMark 2026-07-20 23:17:59 +02:00
  • e57b79c94b pureboot: take the emitted loader HEX for --update-loader BlackMark 2026-07-20 22:46:50 +02:00
  • 82a31d4f16 pureboot: drive the serial port on Windows too BlackMark 2026-07-20 22:46:14 +02:00
  • d6b3e85284 build: emit an Intel-HEX beside every loader image BlackMark 2026-07-20 21:57:26 +02:00
  • 7d046c3b89 pureboot: PI lint, tightened gates, and the self-update test suite BlackMark 2026-07-20 19:37:57 +02:00
  • f964b875b9 pureboot: one position-independent binary — its own staging loader BlackMark 2026-07-20 19:37:43 +02:00
  • 6594c1b044 pureboot: harden the sim device runner BlackMark 2026-07-20 19:37:10 +02:00
  • cbe6acff13 pureboot: review-pass fixes to the host tool and device runner BlackMark 2026-07-20 10:45:19 +02:00
  • 9145d1ec22 pureboot: gitignore python bytecode cache BlackMark 2026-07-20 10:43:56 +02:00
  • 3e4df8638c pureboot: stop tracking the python bytecode cache BlackMark 2026-07-20 10:43:36 +02:00
  • 2133627057 pureboot: host tool and end-to-end protocol tests, all three chips BlackMark 2026-07-20 05:54:15 +02:00
  • 47990349a4 pureboot: the device — one pure C++ source, 512 bytes, every chip BlackMark 2026-07-20 05:33:28 +02:00
  • 74d8b92885 tsb: third size pass — restructure to the oracle's shape BlackMark 2026-07-20 01:00:27 +02:00
  • 2b705ad130 tsb: beat the first-pass size floors (tricks 666, pure 842) BlackMark 2026-07-19 20:15:49 +02:00
  • fc5433fd7d tsb: drive each tier to its size floor BlackMark 2026-07-19 18:47:38 +02:00
  • ac9447c07f tsb: document the three tiers at full parity in the build file BlackMark 2026-07-19 16:50:18 +02:00
  • beff7bb3ee tsb: protocol test covers the password gate and emergency erase BlackMark 2026-07-19 16:49:20 +02:00
  • 3a0d3790ee tsb: pure and tricks tiers reach full oracle feature parity BlackMark 2026-07-19 16:47:21 +02:00
  • 3ea8957e69 tsb: asm tier reaches full oracle feature parity at 502 B BlackMark 2026-07-19 16:23:16 +02:00
  • 04c04abe3e tsb: vendor the fixed-baud assembly oracle as the size/feature bar BlackMark 2026-07-19 15:29:58 +02:00
  • f32a27ff15 tsb: use the named register surface BlackMark 2026-07-19 14:55:01 +02:00
  • 57d94cf631 tsb: refactor the pure tier onto libavr sugar BlackMark 2026-07-19 13:33:53 +02:00
  • 8203a24f33 tsb: slim the port branch to the libavr reimplementation BlackMark 2026-07-19 13:12:56 +02:00
  • 2906da3272 tsb: drop the local -O3 strip, now handled by the libavr toolchain BlackMark 2026-07-19 10:52:13 +02:00
  • 64c1e484b5 tsb: reimplement TinySafeBoot on libavr in three size tiers BlackMark 2026-07-19 05:00:51 +02:00
  • 14ac91c815 Update uart submodule master BlackMark 2020-04-13 17:20:31 +02:00
  • 621d34cc18 Update uart submodule BlackMark 2020-04-13 13:08:34 +02:00
  • 0a65626975 Update uart submodule to fix 115200 baud with 16 MHz BlackMark 2020-04-13 00:22:02 +02:00
  • 9390f7830b Add small blink example as bootloader payload test BlackMark 2020-04-12 18:45:33 +02:00
  • b21673e326 Uncomment setting stack pointer to allow jumping into bootloader BlackMark 2020-04-12 18:43:53 +02:00
  • 3afda0ebf9 Replace function call to user code with jump BlackMark 2020-04-12 16:05:16 +02:00
  • 807b1f336f Finish bootloader by adding jump to user code BlackMark 2020-04-12 15:32:31 +02:00
  • 5f8d6a6f85 Fix chip erase followed immediately by flash programming BlackMark 2020-04-12 15:12:02 +02:00
  • 41f81247ce Improve semantics for chip erase state enum BlackMark 2020-04-12 15:07:58 +02:00
  • a72bf67b07 Fix flash memory address being a word-address BlackMark 2020-04-12 13:10:00 +02:00
  • 3a04b1f488 Add topcard detection for avrdude BlackMark 2020-04-12 12:01:53 +02:00
  • 8979066420 Fix receiveByte timeout and add global timeout BlackMark 2020-04-12 11:47:11 +02:00
  • 6f9d8bae42 Implement writing flash memory BlackMark 2020-04-12 00:15:26 +02:00
  • 289e66160e Refactor getting bootloader size from lambda to function BlackMark 2020-04-12 00:14:51 +02:00
  • 355160dedb Increase uart receive timeout BlackMark 2020-04-12 00:12:56 +02:00
  • b20d0aced8 Change bootloader location of debug build BlackMark 2020-04-11 23:02:50 +02:00
  • f307eb1340 Fix bootloader size read-out BlackMark 2020-04-11 23:02:16 +02:00
  • 3ce9c60448 Refactor address variable BlackMark 2020-04-11 22:25:30 +02:00
  • 16955979a2 Implement chip erase BlackMark 2020-04-11 22:19:22 +02:00
  • 28eeca8158 Move transmitMessage to message handling part BlackMark 2020-04-11 21:17:10 +02:00
  • 03fd10860f Implement eeprom programming BlackMark 2020-04-11 19:19:23 +02:00
  • 9c24c32f3d Add reading of eeprom BlackMark 2020-04-11 17:48:13 +02:00
  • c46ba6bbb3 Move code to bootloader section and provide custom init code BlackMark 2020-04-11 16:51:09 +02:00
  • 98d6c9720f Add flash reading functionality BlackMark 2020-04-11 10:35:52 +02:00
  • 9ba16e71e1 Fix checksum discarding high-order byte of size field BlackMark 2020-04-11 10:34:40 +02:00
  • c5b3614733 Add reading of lock bits BlackMark 2020-04-10 16:47:17 +02:00
  • c808c344b4 Implement basic stk500v2 protocol support BlackMark 2020-04-10 16:09:41 +02:00
  • 0e39021192 Add all stk500v2 commands BlackMark 2020-04-10 10:22:28 +02:00
  • 39c98939bd Add uart to stk500v2 BlackMark 2020-04-10 10:11:47 +02:00
  • ef42a67d10 Change clock crystal to 18.432 MHz BlackMark 2020-04-10 10:06:11 +02:00
  • cf60d846b6 Rename solution and add stk500v2 bootloader project BlackMark 2020-04-10 08:56:54 +02:00
  • 4348759652 Implement basic tsb protocol for information command BlackMark 2020-04-10 08:50:22 +02:00
  • 8386d55813 Initial commit BlackMark 2020-04-10 08:47:54 +02:00