pureboot 6: a build-time OSCCAL trim, applied ahead of every reset path
The RC-oscillator answer's device half (dev/tasks.md in libavr): OSCCAL joins pureboot_add_loader() as one optional byte, written at the top of run() before the WDRF bail so the watchdog hand-over inherits the corrected clock too. Orthogonal to the backend — an autobaud build may carry it purely for the application. No value, no code: the stock image differs from v5 in exactly the version's two bytes (the stamp and the 'b' immediate). Measured: +6 B where OSCCAL takes sts (328P, 404→410), +4 B in low I/O (t85, 402→406); the tightest image in the space (1284 autobaud on USART pins, 504) carries the sts form at 510 of 512. New gates: the OSCCAL size points on every chip, the wire-observed trim byte on both addressing classes (test/pbosccal.py, red-green), and the autobaud unit pinned to ram_start (test/check_unit.cmake, red-green) — the address --info's measured-clock read is about to rely on. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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@@ -24,13 +24,15 @@ else:
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import termios
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PROMPT = b"+"
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VERSION = 5 # this tool's own version — free to drift from a loader's
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# The loader versions this tool speaks. A pureboot version implies its wire
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VERSION = 6 # this tool's own version — free to drift from a loader's
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# The loader versions this tool can drive. A pureboot version implies its wire
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# protocol, which carries no number of its own, so this window is where that
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# map lives: every version so far speaks the same protocol, and one that
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# changes it becomes the new floor here.
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# map lives: the tool keeps a decoder for every generation in it (1–4 speak
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# the per-memory commands, 5 the unified pair; 6 marks the OSCCAL-carrying
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# builds and changes nothing on the wire), and a version it has no decoder
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# for moves the floor.
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OLDEST_LOADER = 1
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NEWEST_LOADER = 5
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NEWEST_LOADER = 6
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SLOT = 512 # the loader slot, on every chip
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RETRIES = 3 # rewrites of a page that reads back wrong, before the run stops
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