117 lines
3.5 KiB
C++
117 lines
3.5 KiB
C++
#pragma once
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#include <stdint.h>
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/sfr_defs.h>
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#include "config.hpp"
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#include "hardware.hpp"
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#define FORCE_INLINE __attribute__((always_inline))
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namespace uart {
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namespace detail {
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#if defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega328P__)
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/*
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The following works in avr-gcc 5.4.0, but is not legal C++, because ptr's are not legal constexpr's
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constexpr auto *foo = ptr;
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Workaround is to store the the address of the ptr in a uintptr_t and reinterpret_cast it at call site
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For this the sfr_defs.h provides a macro which returns the address of a register
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*/
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struct Registers0 {
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static constexpr uintptr_t IO_REG_ADDR = _SFR_ADDR(UDR0);
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static constexpr uintptr_t CTRL_STAT_REG_A_ADDR = _SFR_ADDR(UCSR0A);
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static constexpr uintptr_t CTRL_STAT_REG_B_ADDR = _SFR_ADDR(UCSR0B);
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static constexpr uintptr_t CTRL_STAT_REG_C_ADDR = _SFR_ADDR(UCSR0C);
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static constexpr uintptr_t BAUD_REG_L_ADDR = _SFR_ADDR(UBRR0L);
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static constexpr uintptr_t BAUD_REG_H_ADDR = _SFR_ADDR(UBRR0H);
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};
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enum class ControlFlagsA0 {
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MULTI_PROC_COMM_MODE = MPCM0,
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SPEED_2X = U2X0,
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PARITY_ERROR = UPE0,
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DATA_OVER_RUN = DOR0,
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FRAME_ERROR = FE0,
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DATA_REG_EMPTY = UDRE0,
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TRANSMIT_COMPLETE = TXC0,
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RECEIVE_COMPLETE = RXC0,
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};
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enum class ControlFlagsB0 {
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TX_DATA_BIT_8 = TXB80,
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RX_DATA_BIT_8 = RXB80,
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CHAR_SIZE_2 = UCSZ02,
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TX_ENABLE = TXEN0,
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RX_ENABLE = RXEN0,
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DATA_REG_EMPTY_INT_ENABLE = UDRIE0,
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TX_INT_ENABLE = TXCIE0,
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RX_INT_ENABLE = RXCIE0,
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};
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enum class ControlFlagsC0 {
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CLK_POLARITY = UCPOL0,
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CHAR_SIZE_0 = UCSZ00,
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CHAR_SIZE_1 = UCSZ01,
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STOP_BIT_SEL = USBS0,
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PARITY_MODE_0 = UPM00,
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PARITY_MODE_1 = UPM01,
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MODE_SEL_0 = UMSEL00,
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MODE_SEL_1 = UMSEL01,
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};
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// clang-format off
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constexpr int operator<<(const int &lhs, const ControlFlagsA0 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsB0 &rhs) { return lhs << static_cast<int>(rhs); }
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constexpr int operator<<(const int &lhs, const ControlFlagsC0 &rhs) { return lhs << static_cast<int>(rhs); }
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// clang-format on
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extern void (*fnRx0IntHandler)();
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extern void (*fnDataReg0EmptyIntHandler)();
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#else
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#error "This chip is not supported"
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#endif
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} // namespace detail
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template <class cfg = Config<>, Driven driven = Driven::INTERRUPT, Mode mode = Mode::ASYNCHRONOUS>
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class Hardware0 : public detail::BlockingHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode> {
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};
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template <class cfg, Mode mode>
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class Hardware0<cfg, Driven::INTERRUPT, mode>
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: public detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode> {
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using detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode>::rxIntHandler;
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using detail::InterruptHardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, mode>::dataRegEmptyIntHandler;
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using HardwareImpl = detail::Hardware<detail::Registers0, detail::ControlFlagsA0, detail::ControlFlagsB0,
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detail::ControlFlagsC0, cfg, Driven::INTERRUPT, mode>;
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public:
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static void init() FORCE_INLINE
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{
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detail::fnRx0IntHandler = rxIntHandler;
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detail::fnDataReg0EmptyIntHandler = dataRegEmptyIntHandler;
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HardwareImpl::init();
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sei();
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}
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};
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} // namespace uart
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#undef FORCE_INLINE
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