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base: avr:8e6c3738f88787dcffaf547b53871e8d9a013882
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avr:master
avr:example
...
compare: avr:4b644b22bf4ced4406eb6427a7e437604fc26357
Branches Tags
avr:master
avr:example

4 Commits
8e6c3738f8 ... 4b644b22bf

Author SHA1 Message Date
BlackMark
4b644b22bf Completely separted driver from interface 2020-02-21 17:29:45 +01:00
BlackMark
c73d83dff4 Removed deinit 2020-02-21 17:26:30 +01:00
BlackMark
3fae89285f Moved init to hardware driver class 2020-02-21 17:26:14 +01:00
BlackMark
e0fd37dbb0 Added config and hardware templates 2020-02-21 17:10:49 +01:00
3 changed files with 183 additions and 140 deletions
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44
config.hpp Normal file
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#pragma once
namespace spi {
enum class ClockDiv {
DIV_4 = 0,
DIV_16 = 1,
DIV_64 = 2,
DIV_128 = 3,
DIV_2X_2 = 4,
DIV_2X_8 = 5,
DIV_2X_32 = 6,
DIV_2X_64 = 7,
};
enum class Mode {
MODE_0 = 0,
MODE_1 = 1,
MODE_2 = 2,
MODE_3 = 3,
};
enum class Side {
MASTER,
SLAVE,
};
enum class BitOrder {
LSB_FIRST,
MSB_FIRST,
};
template <ClockDiv freq = ClockDiv::DIV_128, Mode mode = Mode::MODE_0, Side side = Side::MASTER,
BitOrder bitOrder = BitOrder::MSB_FIRST, bool pullup = false>
struct Config {
static constexpr auto FREQ = freq;
static constexpr auto MODE = mode;
static constexpr auto SIDE = side;
static constexpr auto BIT_ORDER = bitOrder;
static constexpr auto PULLUP = pullup;
};
} // namespace spi

129
hardware.hpp Normal file
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#pragma once
#include "../io/io.hpp"
namespace spi {
template <class Cfg>
class Hardware {
public:
static void init()
{
if constexpr (Cfg::SIDE == Side::MASTER) {
sm_ss = true;
sm_sck.dir(io::Dir::OUT);
sm_miso.dir(io::Dir::IN);
sm_miso.pullup(Cfg::PULLUP);
sm_mosi.dir(io::Dir::OUT);
sm_ss.dir(io::Dir::OUT);
} else {
sm_sck.dir(io::Dir::IN);
sm_miso.dir(io::Dir::OUT);
sm_mosi.dir(io::Dir::IN);
sm_ss.dir(io::Dir::IN);
sm_ss.pullup(true);
}
setClockDiv();
setMode();
setMaster();
setBitOrder();
SPCR |= (1 << SPE);
}
static uint8_t transfer(uint8_t data)
{
SPDR = data;
while (!(SPSR & (1 << SPIF)))
;
return SPDR;
}
static void select(bool selectState)
{
sm_ss = !selectState;
}
private:
static io::Pin<io::P::B5> sm_sck;
static io::Pin<io::P::B4> sm_miso;
static io::Pin<io::P::B3> sm_mosi;
static io::Pin<io::P::B2> sm_ss;
static void setClockDiv()
{
uint8_t ui8ClockDiv = static_cast<uint8_t>(Cfg::FREQ);
if (ui8ClockDiv & 1) {
SPCR |= (1 << SPR0);
} else {
SPCR &= ~(1 << SPR0);
}
if (ui8ClockDiv & (1 << 1)) {
SPCR |= (1 << SPR1);
} else {
SPCR &= ~(1 << SPR1);
}
if (ui8ClockDiv & (1 << 2)) {
SPSR |= (1 << SPI2X);
} else {
SPSR &= ~(1 << SPI2X);
}
}
static void setMode()
{
if (Cfg::MODE == Mode::MODE_0 || Cfg::MODE == Mode::MODE_1) {
setCPOL(false);
} else {
setCPOL(true);
}
if (Cfg::MODE == Mode::MODE_0 || Cfg::MODE == Mode::MODE_2) {
setCPHA(false);
} else {
setCPHA(true);
}
}
static void setMaster()
{
if constexpr (Cfg::SIDE == Side::MASTER) {
SPCR |= (1 << MSTR);
} else {
SPCR &= ~(1 << MSTR);
}
}
static void setBitOrder()
{
if (Cfg::BIT_ORDER == BitOrder::LSB_FIRST) {
SPCR |= (1 << DORD);
} else {
SPCR &= ~(1 << DORD);
}
}
static void setCPOL(bool bCPOL)
{
if (bCPOL) {
SPCR |= (1 << CPOL);
} else {
SPCR &= ~(1 << CPOL);
}
}
static void setCPHA(bool bCPHA)
{
if (bCPHA) {
SPCR |= (1 << CPHA);
} else {
SPCR &= ~(1 << CPHA);
}
}
};
} // namespace spi

150
spi.hpp
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@ -1,161 +1,31 @@
#pragma once
#include "config.hpp"
#include "hardware.hpp"
#include "../io/io.hpp"
#include <avr/io.h>
namespace spi {
template <class Driver>
class Spi {
public:
enum class ClockDiv {
CLKDIV_4 = 0,
CLKDIV_16 = 1,
CLKDIV_64 = 2,
CLKDIV_128 = 3,
CLKDIV_2X_2 = 4,
CLKDIV_2X_8 = 5,
CLKDIV_2X_32 = 6,
CLKDIV_2X_64 = 7,
};
enum class Mode {
MODE_0 = 0,
MODE_1 = 1,
MODE_2 = 2,
MODE_3 = 3,
};
private:
static void setCPOL(bool bCPOL)
static void init()
{
if (bCPOL) {
SPCR |= (1 << CPOL);
} else {
SPCR &= ~(1 << CPOL);
}
}
static void setCPHA(bool bCPHA)
{
if (bCPHA) {
SPCR |= (1 << CPHA);
} else {
SPCR &= ~(1 << CPHA);
}
}
static io::Pin<io::P::B5> sm_cSCK;
static io::Pin<io::P::B4> sm_cMISO;
static io::Pin<io::P::B3> sm_cMOSI;
static io::Pin<io::P::B2> sm_cSS;
public:
static void init(ClockDiv enmClockDiv = ClockDiv::CLKDIV_128, Mode enmMode = Mode::MODE_0, bool bMaster = true,
bool bLSBFirst = false, bool bMISOPullup = false)
{
if (bMaster) {
sm_cSS.write(true);
sm_cSCK.dir(io::Dir::OUT);
sm_cMISO.dir(io::Dir::IN);
sm_cMISO.pullup(bMISOPullup);
sm_cMOSI.dir(io::Dir::OUT);
sm_cSS.dir(io::Dir::OUT);
} else {
sm_cSCK.dir(io::Dir::IN);
sm_cMISO.dir(io::Dir::OUT);
sm_cMOSI.dir(io::Dir::IN);
sm_cSS.dir(io::Dir::IN);
sm_cSS.pullup(true);
}
setClockDiv(enmClockDiv);
setMode(enmMode);
setMaster(bMaster);
setBitOrder(bLSBFirst);
SPCR |= (1 << SPE);
}
static void deinit()
{
SPCR = 0;
sm_cSCK.dir(io::Dir::IN);
sm_cMISO.dir(io::Dir::IN);
sm_cMOSI.dir(io::Dir::IN);
sm_cSS.dir(io::Dir::IN);
}
static void setClockDiv(ClockDiv enmClockDiv)
{
uint8_t ui8ClockDiv = static_cast<uint8_t>(enmClockDiv);
if (ui8ClockDiv & 1) {
SPCR |= (1 << SPR0);
} else {
SPCR &= ~(1 << SPR0);
}
if (ui8ClockDiv & (1 << 1)) {
SPCR |= (1 << SPR1);
} else {
SPCR &= ~(1 << SPR1);
}
if (ui8ClockDiv & (1 << 2)) {
SPSR |= (1 << SPI2X);
} else {
SPSR &= ~(1 << SPI2X);
}
}
static void setMode(Mode enmMode)
{
if (enmMode == Mode::MODE_0 || enmMode == Mode::MODE_1) {
setCPOL(false);
} else {
setCPOL(true);
}
if (enmMode == Mode::MODE_0 || enmMode == Mode::MODE_2) {
setCPHA(false);
} else {
setCPHA(true);
}
}
static void setMaster(bool bMaster)
{
if (bMaster) {
SPCR |= (1 << MSTR);
} else {
SPCR &= ~(1 << MSTR);
}
}
static void setBitOrder(bool bLSBFirst)
{
if (bLSBFirst) {
SPCR |= (1 << DORD);
} else {
SPCR &= ~(1 << DORD);
}
Driver::init();
}
static uint8_t transfer(uint8_t ui8Data)
{
SPDR = ui8Data;
while (!(SPSR & (1 << SPIF)))
;
return SPDR;
return Driver::transfer(ui8Data);
}
static void select(bool bSelect)
{
sm_cSS.write(!bSelect);
Driver::select(bSelect);
}
private:
};
} // namespace spi