2019-07-26 18:49:53 +02:00
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#pragma once
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2016-02-25 21:48:49 +01:00
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#include <stdint.h>
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2018-04-24 18:59:12 +02:00
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2016-02-25 21:48:49 +01:00
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#include <avr/io.h>
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2019-07-26 18:49:53 +02:00
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//////////////////////////////////////////////////////////////////////////
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// Preprocessor defines
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2019-08-10 12:54:23 +02:00
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#if defined(__AVR_ATmega32__) || defined(__AVR_ATmega32A__) || defined(__AVR_ATmega644P__) || \
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defined(__AVR_ATmega1284P__)
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#define GPIO_32
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#endif
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#if defined(__AVR_ATmega8__) || defined(__AVR_ATmega8A__) || defined(__AVR_ATmega168A__) || defined(__AVR_ATmega328P__)
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#define GPIO_23
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#endif
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#if defined(__AVR_ATtiny13A__) || defined(__AVR_ATtiny85__)
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#define GPIO_6
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#endif
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#if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega168A__) || \
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defined(__AVR_ATmega328P__) || defined(__AVR_ATtiny13A__) || defined(__AVR_ATtiny85__)
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#define HARDWARE_TOGGLE
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#endif
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#ifdef GPIO_32
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#define PORT_A_AVAILABLE
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#endif
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#if defined(GPIO_32) || defined(GPIO_23) || defined(GPIO_6)
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#define PORT_B_AVAILABLE
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#endif
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#if defined(GPIO_32) || defined(GPIO_23)
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#define PORT_C_AVAILABLE
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#define PORT_D_AVAILABLE
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#define PIN_B6_AVAILABLE
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#define PIN_B7_AVAILABLE
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#endif
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#if defined(GPIO_32)
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#define PIN_C7_AVAILABLE
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#endif
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2019-07-26 18:49:53 +02:00
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#define FORCE_INLINE __attribute__((always_inline))
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2018-04-26 15:23:42 +02:00
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2018-04-24 18:59:12 +02:00
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//////////////////////////////////////////////////////////////////////////
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2019-07-26 18:49:53 +02:00
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// Library implementation
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namespace io {
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enum class Dir { IN, OUT };
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enum class P {
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#ifdef PORT_A_AVAILABLE
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2019-07-26 18:49:53 +02:00
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A0 = 0x00,
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A1 = 0x01,
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A2 = 0x02,
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A3 = 0x03,
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A4 = 0x04,
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A5 = 0x05,
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A6 = 0x06,
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A7 = 0x07,
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2016-02-25 21:48:49 +01:00
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#endif
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#ifdef PORT_B_AVAILABLE
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B0 = 0x10,
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B1 = 0x11,
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B2 = 0x12,
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B3 = 0x13,
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B4 = 0x14,
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B5 = 0x15,
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#ifdef PIN_B6_AVAILABLE
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2019-07-26 18:49:53 +02:00
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B6 = 0x16,
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#endif
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#ifdef PIN_B7_AVAILABLE
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B7 = 0x17,
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#endif
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2016-02-25 21:48:49 +01:00
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#endif
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_C_AVAILABLE
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2019-07-26 18:49:53 +02:00
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C0 = 0x20,
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C1 = 0x21,
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C2 = 0x22,
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C3 = 0x23,
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C4 = 0x24,
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C5 = 0x25,
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C6 = 0x26,
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#ifdef PIN_C7_AVAILABLE
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C7 = 0x27,
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#endif
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2016-02-25 21:48:49 +01:00
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#endif
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_D_AVAILABLE
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D0 = 0x30,
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D1 = 0x31,
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D2 = 0x32,
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D3 = 0x33,
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D4 = 0x34,
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D5 = 0x35,
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D6 = 0x36,
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D7 = 0x37,
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2016-02-25 21:48:49 +01:00
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#endif
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2019-07-26 18:49:53 +02:00
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};
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2016-02-25 21:48:49 +01:00
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2019-07-26 18:49:53 +02:00
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enum class Bus {
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#ifdef PORT_A_AVAILABLE
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A = 0x00,
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2016-02-25 21:48:49 +01:00
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#endif
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_B_AVAILABLE
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2019-07-26 18:49:53 +02:00
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B = 0x01,
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2018-04-24 18:59:12 +02:00
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#endif
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_C_AVAILABLE
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2019-07-26 18:49:53 +02:00
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C = 0x02,
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2018-04-24 18:59:12 +02:00
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#endif
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_D_AVAILABLE
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2019-07-26 18:49:53 +02:00
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D = 0x03,
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2016-02-25 21:48:49 +01:00
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#endif
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2019-07-26 18:49:53 +02:00
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};
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//////////////////////////////////////////////////////////////////////////
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// Implementation details
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namespace detail {
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_A_AVAILABLE
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2019-07-26 18:49:53 +02:00
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static constexpr volatile uint8_t *PORT_A_DIR_REG = &DDRA;
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static constexpr volatile uint8_t *PORT_A_OUTPUT_REG = &PORTA;
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static constexpr volatile uint8_t *PORT_A_INPUT_REG = &PINA;
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#else
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static constexpr volatile uint8_t *PORT_A_DIR_REG = nullptr;
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static constexpr volatile uint8_t *PORT_A_OUTPUT_REG = nullptr;
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static constexpr volatile uint8_t *PORT_A_INPUT_REG = nullptr;
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2016-02-25 21:48:49 +01:00
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#endif
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2018-04-24 18:59:12 +02:00
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_B_AVAILABLE
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2019-07-26 18:49:53 +02:00
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static constexpr volatile uint8_t *PORT_B_DIR_REG = &DDRB;
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static constexpr volatile uint8_t *PORT_B_OUTPUT_REG = &PORTB;
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static constexpr volatile uint8_t *PORT_B_INPUT_REG = &PINB;
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#else
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static constexpr volatile uint8_t *PORT_B_DIR_REG = nullptr;
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static constexpr volatile uint8_t *PORT_B_OUTPUT_REG = nullptr;
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static constexpr volatile uint8_t *PORT_B_INPUT_REG = nullptr;
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2018-04-24 18:59:12 +02:00
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#endif
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2019-07-26 18:49:53 +02:00
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_C_AVAILABLE
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2019-07-26 18:49:53 +02:00
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static constexpr volatile uint8_t *PORT_C_DIR_REG = &DDRC;
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static constexpr volatile uint8_t *PORT_C_OUTPUT_REG = &PORTC;
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static constexpr volatile uint8_t *PORT_C_INPUT_REG = &PINC;
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#else
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static constexpr volatile uint8_t *PORT_C_DIR_REG = nullptr;
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static constexpr volatile uint8_t *PORT_C_OUTPUT_REG = nullptr;
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static constexpr volatile uint8_t *PORT_C_INPUT_REG = nullptr;
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2016-02-25 21:48:49 +01:00
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#endif
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2019-07-26 18:49:53 +02:00
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2019-08-10 12:54:23 +02:00
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#ifdef PORT_D_AVAILABLE
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2019-07-26 18:49:53 +02:00
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static constexpr volatile uint8_t *PORT_D_DIR_REG = &DDRD;
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static constexpr volatile uint8_t *PORT_D_OUTPUT_REG = &PORTD;
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static constexpr volatile uint8_t *PORT_D_INPUT_REG = &PIND;
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#else
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static constexpr volatile uint8_t *PORT_D_DIR_REG = nullptr;
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static constexpr volatile uint8_t *PORT_D_OUTPUT_REG = nullptr;
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static constexpr volatile uint8_t *PORT_D_INPUT_REG = nullptr;
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2016-02-25 21:48:49 +01:00
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#endif
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2019-07-26 18:49:53 +02:00
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static constexpr auto getBus(const P pin)
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{
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// Upper 4 bits of pin encode which port this pin is on
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uint8_t port = static_cast<uint8_t>(pin) >> 4 & 0x0F;
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return static_cast<Bus>(port);
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}
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static constexpr auto getPin(const P pin)
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{
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// Lower 4 bits of pin encode which pin bit it is
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uint8_t pinBit = static_cast<uint8_t>(pin) & 0x0F;
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return pinBit;
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}
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static constexpr auto getDDR(const Bus bus)
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{
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switch (static_cast<uint8_t>(bus)) {
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case 0: // Bus::A
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return PORT_A_DIR_REG;
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case 1: // Bus::B
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return PORT_B_DIR_REG;
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case 2: // Bus::C
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return PORT_C_DIR_REG;
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case 3: // Bus::D
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return PORT_D_DIR_REG;
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}
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}
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static constexpr auto getPORT(const Bus bus)
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{
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switch (static_cast<uint8_t>(bus)) {
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case 0: // Bus::A
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return PORT_A_OUTPUT_REG;
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case 1: // Bus::B
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return PORT_B_OUTPUT_REG;
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case 2: // Bus::C
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return PORT_C_OUTPUT_REG;
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case 3: // Bus::D
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return PORT_D_OUTPUT_REG;
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}
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}
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static constexpr auto getPIN(const Bus bus)
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{
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switch (static_cast<uint8_t>(bus)) {
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case 0: // Bus::A
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return PORT_A_INPUT_REG;
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case 1: // Bus::B
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return PORT_B_INPUT_REG;
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case 2: // Bus::C
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return PORT_C_INPUT_REG;
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case 3: // Bus::D
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return PORT_D_INPUT_REG;
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}
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}
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} // namespace detail
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//////////////////////////////////////////////////////////////////////////
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// Zero overhead Pin object for pretty code without losing performance
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2019-07-28 14:00:12 +02:00
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template <P pin>
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2019-07-26 18:49:53 +02:00
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class Pin {
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public:
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// Pin objects cannot be moved or copied
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Pin(const Pin &) = delete;
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Pin(Pin &&) = delete;
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Pin &operator=(const Pin &) = delete;
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Pin &operator=(Pin &&) = delete;
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// The only valid way to create a Pin object is with the default constructor
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Pin() = default;
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static inline void dir(const Dir dir) FORCE_INLINE
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2016-02-25 21:48:49 +01:00
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{
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2019-07-26 18:49:53 +02:00
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constexpr auto bus = detail::getBus(pin);
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constexpr auto dirReg = detail::getDDR(bus);
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constexpr auto pinBit = detail::getPin(pin);
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if (dir == Dir::IN)
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*dirReg &= ~(1 << pinBit);
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else if (dir == Dir::OUT)
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*dirReg |= (1 << pinBit);
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}
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2016-02-25 21:48:49 +01:00
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2019-07-26 18:49:53 +02:00
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static inline void pullup(const bool enable) FORCE_INLINE
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2016-02-25 21:48:49 +01:00
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{
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2019-07-26 18:49:53 +02:00
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constexpr auto bus = detail::getBus(pin);
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constexpr auto portReg = detail::getPORT(bus);
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constexpr auto pinBit = detail::getPin(pin);
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if (enable)
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*portReg |= (1 << pinBit);
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else
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*portReg &= ~(1 << pinBit);
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}
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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static inline void write(const bool value) FORCE_INLINE
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2016-02-25 21:48:49 +01:00
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{
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2019-07-26 18:49:53 +02:00
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constexpr auto bus = detail::getBus(pin);
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constexpr auto portReg = detail::getPORT(bus);
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constexpr auto pinBit = detail::getPin(pin);
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if (value)
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*portReg |= (1 << pinBit);
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else
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*portReg &= ~(1 << pinBit);
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2016-02-25 21:48:49 +01:00
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}
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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static inline void toggle() FORCE_INLINE
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2018-04-26 15:23:42 +02:00
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{
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2019-08-10 12:54:23 +02:00
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#ifdef HARDWARE_TOGGLE
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2019-07-26 19:44:20 +02:00
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constexpr auto bus = detail::getBus(pin);
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constexpr auto pinReg = detail::getPIN(bus);
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constexpr auto pinBit = detail::getPin(pin);
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*pinReg |= (1 << pinBit);
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#else
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2019-07-26 18:49:53 +02:00
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constexpr auto bus = detail::getBus(pin);
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constexpr auto portReg = detail::getPORT(bus);
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constexpr auto pinBit = detail::getPin(pin);
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*portReg ^= (1 << pinBit);
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2019-07-26 19:44:20 +02:00
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#endif
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2018-04-26 15:23:42 +02:00
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}
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2018-04-24 18:59:12 +02:00
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2019-07-26 18:49:53 +02:00
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static inline bool read() FORCE_INLINE
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{
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constexpr auto bus = detail::getBus(pin);
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constexpr auto pinReg = detail::getPIN(bus);
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constexpr auto pinBit = detail::getPin(pin);
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2018-04-24 18:59:12 +02:00
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2019-07-26 18:49:53 +02:00
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if (*pinReg >> pinBit & 1)
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return true;
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return false;
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}
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Pin &operator=(const bool value) FORCE_INLINE
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{
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write(value);
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return *this;
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}
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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operator bool() const FORCE_INLINE
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{
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return read();
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}
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2018-04-24 18:59:12 +02:00
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};
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2016-05-24 19:41:59 +02:00
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2018-04-24 18:59:12 +02:00
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//////////////////////////////////////////////////////////////////////////
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2019-07-26 18:49:53 +02:00
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// Zero overhead Port object for pretty code without losing performance
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2016-05-24 19:41:59 +02:00
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2019-07-28 14:00:12 +02:00
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template <Bus port>
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2019-07-26 18:49:53 +02:00
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class Port {
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public:
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// Port objects cannot be moved or copied
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Port(const Port &) = delete;
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Port(Port &&) = delete;
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Port &operator=(const Port &) = delete;
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Port &operator=(Port &&) = delete;
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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// The only valid way to create a Port object is with the default constructor
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Port() = default;
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2018-04-24 18:59:12 +02:00
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2019-07-26 18:49:53 +02:00
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static inline void dir(const Dir dir) FORCE_INLINE
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{
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constexpr auto dirReg = detail::getDDR(port);
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2018-04-26 15:23:42 +02:00
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2019-07-26 18:49:53 +02:00
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if (dir == Dir::IN)
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*dirReg = 0x00;
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else if (dir == Dir::OUT)
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*dirReg = 0xFF;
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}
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2018-04-26 15:23:42 +02:00
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2019-07-26 18:49:53 +02:00
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static inline void pullup(const bool enable) FORCE_INLINE
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{
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constexpr auto portReg = detail::getPORT(port);
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2016-02-25 21:48:49 +01:00
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2019-07-26 18:49:53 +02:00
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if (enable)
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*portReg = 0xFF;
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else
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*portReg = 0x00;
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}
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2018-04-26 15:23:42 +02:00
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2019-07-26 18:49:53 +02:00
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static inline void write(const uint8_t value) FORCE_INLINE
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{
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constexpr auto portReg = detail::getPORT(port);
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2016-02-25 21:48:49 +01:00
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2019-07-26 18:49:53 +02:00
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*portReg = value;
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}
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2019-01-02 20:54:29 +01:00
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2019-07-26 18:49:53 +02:00
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static inline void invert() FORCE_INLINE
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{
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2019-08-10 12:54:23 +02:00
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#ifdef HARDWARE_TOGGLE
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2019-07-26 19:48:43 +02:00
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constexpr auto pinReg = detail::getPIN(port);
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*pinReg = 0xFF;
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#else
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2019-07-26 18:49:53 +02:00
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constexpr auto portReg = detail::getPORT(port);
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2019-01-02 20:54:29 +01:00
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2019-07-26 18:49:53 +02:00
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*portReg = ~(*portReg);
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2019-07-26 19:48:43 +02:00
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#endif
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2019-07-26 18:49:53 +02:00
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}
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2018-04-24 18:59:12 +02:00
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2019-07-26 18:49:53 +02:00
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static inline uint8_t read() FORCE_INLINE
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{
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constexpr auto pinReg = detail::getPIN(port);
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return *pinReg;
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}
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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inline Port &operator=(const uint8_t value) FORCE_INLINE
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{
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write(value);
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return *this;
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}
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inline operator uint8_t() const FORCE_INLINE
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{
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return read();
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}
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2018-04-24 18:59:12 +02:00
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};
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2016-05-24 19:41:59 +02:00
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2019-07-26 18:49:53 +02:00
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} // namespace io
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2016-05-24 19:41:59 +02:00
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2018-04-24 18:59:12 +02:00
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//////////////////////////////////////////////////////////////////////////
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2019-07-26 18:49:53 +02:00
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#undef GPIO_32
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#undef GPIO_23
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#undef GPIO_6
|
2018-04-24 18:59:12 +02:00
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2019-07-26 18:49:53 +02:00
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#undef PORT_A_AVAILABLE
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#undef PORT_B_AVAILABLE
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#undef PORT_C_AVAILABLE
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#undef PORT_D_AVAILABLE
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#undef PIN_B6_AVAILABLE
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#undef PIN_B7_AVAILABLE
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#undef PIN_C7_AVAILABLE
|
2016-02-25 21:48:49 +01:00
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2019-07-26 18:49:53 +02:00
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#undef FORCE_INLINE
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