43fc479 -> aec9955. The mega328P does not move at 1480 B - it drives the RTC
from the TWI block, which neither change touches. The tiny85 has no TWI, so
dev::i2c resolves to the bit-banged master there and takes both:
cb40a13, the bit period 1238 -> 1262 (+24)
943ffbe, one call shape over every master 1262 -> 1316 (+54)
The first is a bug being paid for. software_master delayed a fixed quarter
period and let its own instructions make up the rest of the bit, so the rate
on the wire followed the inliner; each bit now delays a low and a high phase
net of what that phase already spends. The DS3231 is a 400 kHz part and this
example asks for 100, so nothing here was out of spec - the bytes buy a rate
that no longer moves when the image does.
The second is a trade, and it is worth writing down which way it went. The
shared ladder is smaller than the two it replaced - run_transfer is 232 B
against read_regs 162 + write_regs 102 + stop 30 - but the call-site thunks
that marshal spans into it cost 116 B where the specialised ladders were
inlined, so a driver making both calls nets +54. Filed upstream with these
numbers rather than worked around here: which way the trade falls is a
property of the consumer's mix, and that is the library owner's call.
Size re-recorded in the two places that state it. Four presets green,
cross-mode identity held on both chips.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
The pin advances to the commit that gives consumers the gate's own image
comparison, and the claim written into this README a few commits ago - 1480 B
and 1238 B, byte-identical across the two modes - is registered against it.
Both chips compare clean over every loadable section.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Every other port in the fleet states its image size and is held to it; this
one stated none, so a library advance could move `clock` and no check would
say a word - which is exactly what the size claim was built after. The two
numbers are what the presets build today, byte-identical across generated
and reflect, and the README now says both.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
libavr's guidance binds this repo too, and until now nothing here checked it -
`ctest` runs `libavr_format_test()` over this tree's own sources now (rules 11
and 33), skipping rather than passing where clang-format is absent. It caught
drift on its first run: a file written this week and edited after formatting.
Where the README states a measured size, `libavr_size_claim_test()` holds it to
the image and holds the image to the prose: advancing the library pin moved
three of these across the fleet with nothing saying so, and re-recording one
now requires the sentence that quotes it to move too.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
`set_alarm1/2`'s `enable_interrupt = false` did nothing at all - it skipped the
control-register write rather than clearing A1IE/A2IE - and there was no other
way to clear them, so an alarm armed once with its interrupt on drove INT/SQW
for good. It is `alarm_interrupt::off` now and it clears the bit, with
`listen_alarm1/2()` and `mute_alarm1/2()` beside it for a caller that arms once
and changes its mind later. The bare bool went with it (rule 37): `set_alarm1(at,
rate, false)` said nothing at the point of use.
`bool SetWeekday` was the same shape one level up - `device<bus, false>` names
nothing - and its two writers disagreed about what it meant: `write_date`
skipped the weekday register, `write_clock` stamped a placeholder 1 into it, so
a program that turned the maintenance off still had the register overwritten
and no way to set it. `weekday_source::external` now means the register is the
program's, in both writers.
test/consteval.cpp is the battery this driver never had, over the arithmetic
that has no bus in it: the BCD round trip across every representable value and
its nibble layout, the hours register in both formats including all four
noon/midnight cases, Sakamoto's weekday against six calendar dates (leap day,
the day after it, and 2100's missing leap), and both alarms' rate encodings
transcribed against 19-5170 Table 2 - including that alarm 2's masks sit one
place below alarm 1's, which is the property that makes one distribution loop
wrong for the other. Red-green: two assertions fire on a flipped DY bit.
Beside it, one decode rather than two: `read_clock` and `read_time` spelled the
seconds/minutes/hours triplet out separately (rule 6).
Every image byte-identical on both chips in both modes.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
