build: the libavr pin advances, and the tiny85 image grows 78 B

43fc479 -> aec9955. The mega328P does not move at 1480 B - it drives the RTC
from the TWI block, which neither change touches. The tiny85 has no TWI, so
dev::i2c resolves to the bit-banged master there and takes both:

  cb40a13, the bit period                      1238 -> 1262  (+24)
  943ffbe, one call shape over every master    1262 -> 1316  (+54)

The first is a bug being paid for. software_master delayed a fixed quarter
period and let its own instructions make up the rest of the bit, so the rate
on the wire followed the inliner; each bit now delays a low and a high phase
net of what that phase already spends. The DS3231 is a 400 kHz part and this
example asks for 100, so nothing here was out of spec - the bytes buy a rate
that no longer moves when the image does.

The second is a trade, and it is worth writing down which way it went. The
shared ladder is smaller than the two it replaced - run_transfer is 232 B
against read_regs 162 + write_regs 102 + stop 30 - but the call-site thunks
that marshal spans into it cost 116 B where the specialised ladders were
inlined, so a driver making both calls nets +54. Filed upstream with these
numbers rather than worked around here: which way the trade falls is a
property of the consumer's mix, and that is the library owner's call.

Size re-recorded in the two places that state it. Four presets green,
cross-mode identity held on both chips.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
2026-08-23 02:17:44 +02:00
parent 176f78c2e9
commit bd604ec288
3 changed files with 3 additions and 3 deletions

View File

@@ -5,7 +5,7 @@ libavr_format_test()
if(LIBAVR_MCU STREQUAL "atmega328p")
libavr_size_claim_test(clock 1480)
elseif(LIBAVR_MCU STREQUAL "attiny85")
libavr_size_claim_test(clock 1238)
libavr_size_claim_test(clock 1316)
endif()
# The README says the two modes emit the same image, and only a tree with