BlackMark
e4390d2ba8
The pin crosses libavr's phase 6 - the renamed system surface, the named serial configs, the receiver-tolerance table, the paged SPM receipts - and every loader image comes out size-identical: the full matrix on six representative chips (the exhaustive cross product on three of them), the stock and autobaud columns untouched, the four tsb tiers back on their recorded floors at 510/526/638/836. Byte parity was not free, and the two libavr defects it surfaced were fixed there rather than absorbed here. The EEPROM write procedure's step 2 - the SPMEN spin - had landed unconditionally and cost every build six bytes for a wait a polled loader can never take; it is scoped now, and the loaders state the datasheet's own omission clause (spm_interlock::omitted, DS40002061B 8.6.3). The blocking page erase/write grew an internal wait the tiers' settle() already provides, so the tiers issue the command form and pureboot keeps its host-driven sp_spm path. What the port states rather than inherits: the stock 115200 at 16 MHz sits +2.1 % past the receiver-tolerance table libavr now holds rates to, so the hardware links say .allow_baud_error = true - the same 2.5 % envelope pureboot_baud_feasible() has always enforced, proven on silicon across the fleet. rx_ready() reads readable() now. Alongside the pin: rule 33's ASCII sweep over every source (docs keep their typography), rule 34's InsertBraces in .clang-format with the tree reformatted, std::array over the simavr runners' raw buffers, and the stale Studio size in ide/README.md replaced by the claim its check-flags gate actually holds. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
46 lines
1.7 KiB
Bash
Executable File
46 lines
1.7 KiB
Bash
Executable File
#!/bin/bash
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# The port's gate: every chip's generated workflow - build, size matrix, and
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# the simulator-driven protocol suites. --full adds the reflect-spot builds
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# (libavr's rule: reflect compiles are bounded to its spot set, never the
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# full matrix) and swaps the compact size matrix for the exhaustive
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# clock x baud x backend cross product. libavr resolves from the `libavr/`
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# submodule; LIBAVR_ROOT overrides it for a working tree.
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set -e
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cd "$(dirname "$0")/.."
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full=0
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[[ "$1" == "--full" ]] && { full=1; shift; export PUREBOOT_FULL_MATRIX=1; }
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CHIPS=(attiny13 attiny13a attiny25 attiny45 attiny85
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atmega8 atmega8a atmega16 atmega16a atmega32 atmega32a
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atmega48 atmega48a atmega48p atmega48pa
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atmega88 atmega88a atmega88p atmega88pa
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atmega168 atmega168a atmega168p atmega168pa
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atmega328 atmega328p
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atmega164a atmega164p atmega164pa
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atmega324a atmega324p atmega324pa
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atmega644 atmega644a atmega644p atmega644pa
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atmega1284 atmega1284p)
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REFLECT_SPOT=(attiny13a attiny85 atmega8 atmega16a atmega32a atmega48pa
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atmega88 atmega168pa atmega328p atmega164a atmega644p atmega1284)
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for chip in "${CHIPS[@]}"; do
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echo "==== $chip ===="
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cmake --workflow --preset "$chip-generated" "$@"
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done
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if ((full)); then
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for chip in "${REFLECT_SPOT[@]}"; do
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echo "==== $chip reflect ===="
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cmake --workflow --preset "$chip-reflect" "$@"
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done
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fi
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# Every tree is freshly built now - the one moment the README's size table
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# can be held to what the images measure (a per-preset ctest sees only its
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# own chip; the table needs all of them, and ungated it drifts: a
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# common-code shave moves every row at once with nothing over budget).
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python3 tools/sizes.py check-readme
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echo "check: every chip green"
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