build: the libavr pin advances past phase 6, at byte parity everywhere

The pin crosses libavr's phase 6 - the renamed system surface, the named
serial configs, the receiver-tolerance table, the paged SPM receipts -
and every loader image comes out size-identical: the full matrix on six
representative chips (the exhaustive cross product on three of them),
the stock and autobaud columns untouched, the four tsb tiers back on
their recorded floors at 510/526/638/836.

Byte parity was not free, and the two libavr defects it surfaced were
fixed there rather than absorbed here. The EEPROM write procedure's
step 2 - the SPMEN spin - had landed unconditionally and cost every
build six bytes for a wait a polled loader can never take; it is scoped
now, and the loaders state the datasheet's own omission clause
(spm_interlock::omitted, DS40002061B 8.6.3). The blocking page
erase/write grew an internal wait the tiers' settle() already provides,
so the tiers issue the command form and pureboot keeps its host-driven
sp_spm path.

What the port states rather than inherits: the stock 115200 at 16 MHz
sits +2.1 % past the receiver-tolerance table libavr now holds rates
to, so the hardware links say .allow_baud_error = true - the same
2.5 % envelope pureboot_baud_feasible() has always enforced, proven on
silicon across the fleet. rx_ready() reads readable() now.

Alongside the pin: rule 33's ASCII sweep over every source (docs keep
their typography), rule 34's InsertBraces in .clang-format with the
tree reformatted, std::array over the simavr runners' raw buffers, and
the stale Studio size in ide/README.md replaced by the claim its
check-flags gate actually holds.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

test/pbdirty.py

@@ -1,12 +1,12 @@
 #!/usr/bin/env python3
 """Dirty-page-buffer acceptance test: with no discard in the loader, a page
 filled over words an earlier writer left takes those instead. The whole
-contract is asserted — a bare verify sees the corruption, the repairing
+contract is asserted - a bare verify sees the corruption, the repairing
 verify fixes it in one rewrite, and it stays fixed.
 
 The state is reached the one way the loader cannot prevent: an application
 dirties the buffer and jumps in with no reset between. Boot-sectioned megas
-forbid that outright (SPM runs only from the boot section, Atmel-8271 §26.2),
+forbid that outright (SPM runs only from the boot section, Atmel-8271 section 26.2),
 but simavr dispatches SPM from anywhere, which is what makes it constructible.
 
 Usage: pbdirty.py <device_bin> <pureboot_elf> <mcu> <hz> <base_hex> <page>
@@ -66,7 +66,7 @@ def main():
                 fail(f"the read-back failed, but not at verify: {error}")
         else:
             # Either the fixture no longer dirties the buffer, or the loader
-            # clears it again — in which case this test's premise is gone.
+            # clears it again - in which case this test's premise is gone.
             fail("programming over a dirty page buffer came back clean")
 
         # What the programming path uses: one rewrite settles it, and it stays