pureboot 3: a 512-byte slot on every chip, the 1284s included
The word-addressed 1284s were the one family deploying in a 1 KiB slot, because the far-flash machinery (ELPM reads, RAMPZ page commands, a word-addressed wire) did not fit 512 B. It does now: 478 B stock, 494 B in the heaviest configuration the build can produce. They take the 644s' geometry, where the smallest boot section holds the resident slot and its staging slot together. The loader's version goes to 3; the host tool did not change, so its own version stays 2 and only the window it speaks widens. Most of the saving is one restructure. The info block and a flash read are the same act, so giving all four streamed commands one address-and-count path leaves exactly one call site for the flash streamer: it inlines into the never-returning command loop and its 24-bit cursor stops being saved and restored around every transmit. Around it, the ack byte moved out of line, the wire's byte pair is bit_cast into the word it already is, the fuse loop ends on its count, the info block's in-slot offset is taken as the one-byte relocation it is, and -fno-expensive-optimizations gives way to -fno-move-loop-invariants -fno-tree-ter. Every chip shrank 14-18 B. The size matrix grew the axes it was missing: the USART1 instance across the whole clock ladder, and the shape a slow baud gives a software UART — past 255 delay iterations libavr takes the 16-bit delay loop, which the ladder default never selects and which was 4 B over the 1284's slot the first time it was built. The protocol fixture stopped deriving the loader entry from the flash size; on the 1284s it had been jumping a slot low and reaching the loader only because erased flash walked it up. Docs and comments were consolidated across the port in the same pass: the README carries a per-chip size table instead of prose, and prose that restated the code is gone — 190 lines, no behaviour with it. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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@@ -1,17 +1,12 @@
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#!/usr/bin/env python3
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"""Self-update end-to-end: an application is flashed, then the loader
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replaces itself with a re-timed build through the host tool's
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--update-loader — and the power-fail phases of that update are rehearsed by
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killing the simulated device mid-write, restarting it from its flash dump,
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and letting a re-run complete the update.
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"""Self-update end-to-end: an application is flashed, the loader replaces
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itself with a re-timed build, and every power-fail phase is rehearsed by
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killing the device mid-write, restarting it from its flash dump, and letting
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a re-run complete the update.
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The boot-sectioned megas run the BOOTRST-unprogrammed profile (reset boots
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the application; the fixture application's 'L' jump is the application-owned
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loader entry), with --assume-fuses standing in for the fuse read simavr
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cannot model. The patched-vector chips — the tinies and the m48s — reset
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into a loader at every phase by construction: the t13a because its staging
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slot carries the reset vector itself, the others through the word-0 redirect
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the tool plants around the resident rewrite.
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The boot-sectioned megas run the BOOTRST-unprogrammed profile — reset boots
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the application, whose 'L' is the application-owned loader entry — with
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--assume-fuses standing in for the fuse read simavr cannot model.
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Usage: pbupdate.py <device_bin> <pureboot_elf> <update_elf> <mcu> <hz>
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<base_hex> <page> <baud> <app_bin> <tool_py> <workdir>
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@@ -50,7 +45,7 @@ def assumed_fuses(pb, image):
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image's embedded signature."""
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info = pb.image_info(image)
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which, ladder = pb.BOOT_FUSE[bytes(info.signature[1:3])]
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bits = min((b for b in ladder if ladder[b] * 2 >= 2 * info.slot), key=lambda b: ladder[b])
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bits = min((b for b in ladder if ladder[b] * 2 >= 2 * pb.SLOT), key=lambda b: ladder[b])
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fuses = bytearray((0xFF, 0xFF, 0xFF, 0xFF))
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fuses[which] = 0xF8 | (bits << 1) | 1
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return bytes(fuses)
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@@ -93,16 +88,13 @@ def main():
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# The m48s are megas without a boot section: patched vector, no fuse
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# preflight, and the same reset-to-0 the tinies get.
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patch = not mega or mcu.startswith("atmega48")
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# Word-addressed (>64 KiB) chips use the 1 KiB slot; their loader base
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# itself sits beyond the 16-bit byte space — the 644's base + slot only
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# touches the 64 KiB boundary and stays byte-addressed.
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slot = 1024 if base >= 0x10000 and mega else 512
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reset_hex = "0" if mega else None # the boot-sectioned mega runs BOOTRST-unprogrammed here
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sys.path.insert(0, os.path.dirname(os.path.abspath(tool)))
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sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
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import pbsim
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import pureboot as pb
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slot = pb.SLOT
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os.makedirs(workdir, exist_ok=True)
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objcopy = os.environ.get("PB_OBJCOPY", "avr-objcopy")
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images = {}
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