pureboot: the classic megas' idle poll is a bit-skip — 7 cycles, and their stock window goes wide

The window gate's first full sweep caught it on the atmega8: 6.22 s
measured against 8 declared, the exact 7/9 of a poll modeled as an
extended-I/O lds + skip on a chip whose UCSRA sits in bit-addressable
I/O and compiles to a 2-cycle skip. poll_cycles now follows the status
register's home (7 below 0x40, 9 above). At 16 MHz over 7 cycles the
poll count no longer fits uint24_t, so the classic megas' stock windows
take the wide countdown — 8.000 s measured on all three, +4 B of stock
image (m8 362, m16/m32 364), README stock rows updated.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

pureboot/pureboot.cpp

@@ -172,10 +172,12 @@ struct hardware_link {
 	using uart = avr::uart::usart<usart_unit, C, {.baud = B, .max_baud_error = 2.5_pct}>;
 
 	// The compiled idle poll around the window's narrow (uint24_t) countdown:
-	// lds UCSR0A (2), sbrc skipping the exit (2), sbiw + sbci + brne (5).
-	// A uint32_t countdown pays one more sbci — window_polls() adds it where
-	// the count forces the wide type. Held by the pureboot.window gate.
-	static constexpr std::uint8_t poll_cycles = 9;
+	// the RXC test, then sbiw + sbci + brne (5). The test's cost follows the
+	// status register's home — a 2-cycle bit-skip where UCSRnA sits in
+	// bit-addressable I/O (the classic megas), lds + skip (4) in extended
+	// I/O. A uint32_t countdown pays one more sbci — window_polls() adds it
+	// where the count forces the wide type. Held by the pureboot.window gate.
+	static constexpr std::uint8_t poll_cycles = avr::hw::usart_of<usart_unit>::ucsra::addr < 0x40 ? 7 : 9;
 
 	static void init()
 	{