pureboot: autobaud host support and simavr end-to-end for both variants

pureboot.py --autobaud sends the 0xC0 calibration pulse and a single knock at
the host's chosen baud, reads the slimmed info block, and derives the full
geometry from the signature (AUTOBAUD_GEOMETRY, a table over every pureboot
chip). Everything downstream — flash, EEPROM, fuses, hand-over, verify — is the
fixed-baud path unchanged; the dropped write guard is host-transparent.

test/pbautobaud.py drives each variant over the GPIO⇄pty software-UART bridge
through the calibration handshake and a flash + EEPROM + fuse round-trip
cross-checked against the simulator's ground-truth memory, then repeats at
double the F_CPU with the same binary — the clock-agnostic property autobaud
exists for. Wired as pureboot.autobaud_pure/reg on the near-flash 328P and the
word-addressed 1284P. A wrong measured unit fails the flash/verify, so the test
also pins the codegen-coupled calibration constant against a toolchain bump.

Both variants green in sim on both chips at two clocks each; the fixed-baud
suite is unaffected. Only real-hardware acceptance on an RC part remains
(pureboot/autobaud.md).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

pureboot/autobaud.md

@@ -164,30 +164,49 @@ port's build.
   guarantees safety" (README.md). Self-update still works — it is the safety net
   against host bugs that is lost, not a functional path.
 
-## What remains (either version)
+## Host tool and simulation — done
 
-The decider — does pure C++ fit 512 on every chip — is answered (yes). Not yet
-done, and required before shipping:
+Both are wired and green, for **both** variants.
 
-1. **Sim-validate the lock.** Run the chosen variant over the GPIO⇄pty bridge at
-   ≥3 exact F_CPU (1/8/16 MHz, the tiny13's 9.6 MHz): confirm it measures the
-   right unit and completes a flash + verify. This test is also what pins the
-   codegen-coupled calibration constant (0xC0 vs the 7-cycle loop) against a
-   toolchain bump.
-2. **Host tool + protocol.** `pureboot.py` learns the calibration handshake
-   (send the 0xC0 lead, then knock at the locked rate), the slim info format
-   (derive geometry from the signature), and — for the pure version — that the
-   loader carries no write guard. README protocol section updated.
-3. **Real-hardware acceptance.** Autobaud exists for what a cycle-exact simulator
-   cannot produce: a real RC oscillator at ±10 % with drift and jitter. Drive an
-   internal-oscillator ATtiny from the host at a fixed baud; confirm lock plus a
-   full flash + verify (Windows environment, hardware present — confirm first).
+- **Host tool.** `pureboot.py --autobaud` sends the 0xC0 calibration pulse and a
+  single knock at the host's chosen baud, then reads the slimmed info block and
+  **derives the full geometry from the signature** (`AUTOBAUD_GEOMETRY`, a table
+  over every chip pureboot targets). The rest of the tool — flash, EEPROM, fuses,
+  hand-over, verify — is unchanged: once connected, the derived `Info` presents
+  the same geometry the fixed-baud path reads off the wire. The pure version's
+  dropped write guard is host-transparent (the tool already never targets the
+  running slot).
+- **Sim test** (`test/pbautobaud.py`, `pureboot.autobaud_pure` /
+  `pureboot.autobaud_reg`). Drives each variant over the GPIO⇄pty software-UART
+  bridge through the calibration handshake, a flash + EEPROM + fuse round-trip
+  cross-checked against the simulator's ground-truth memory, and a hand-over to
+  the fixture application — then **repeats at double the F_CPU with the same
+  binary**, which is the clock-agnostic property autobaud exists for. Run on the
+  near-flash 328P and the word-addressed 1284P (both flash-addressing classes).
+  Because the lock fails a flash/verify if the measured unit is wrong, this test
+  also **pins the codegen-coupled calibration constant** (0xC0 against the
+  7-cycle poll loop): a toolchain bump that reshaped the loop would fail it.
+
+## What remains
+
+The decider is answered (pure C++ fits 512 on every chip) and both variants pass
+in simulation. One item remains before shipping the chosen variant:
+
+- **Real-hardware acceptance.** Autobaud exists for what a cycle-exact simulator
+  cannot produce: a real RC oscillator at ±10 % with drift and jitter. simavr
+  proves the arithmetic and the fit at *exact* clocks; only silicon proves the
+  feature does its job. Drive an internal-oscillator ATtiny from the host at a
+  fixed baud; confirm lock plus a full flash + verify (Windows environment,
+  hardware present — confirm first). Deferred until the variant is chosen.
 
 ## Files
 
 - `pureboot_autobaud_pure.cpp` — the pure version (GPIOR/RAM unit, no guard).
 - `pureboot_autobaud_reg.cpp` — the register version (GRV unit, guard kept).
-- `CMakeLists.txt` — `pureboot_add_autobaud()` builds either; the port's build
-  size-tests both on every chip.
+- `pureboot.py` — `--autobaud`: the calibration handshake, slim info, and the
+  signature→geometry table both variants rely on.
+- `test/pbautobaud.py` — the end-to-end sim test; `CMakeLists.txt` runs it for
+  both variants on the 328P and 1284P, and `pureboot_add_autobaud()` size-tests
+  both on every chip.
 - `local/scratch/autobaud/floor_1284.S` (libavr checkout) — the hand-asm floor
   probe, off-tree and gitignored; not sim-verified, a size reference only.