pureboot: the classic megas and the word-addressed 1284P groundwork
Device: boot-section detection probes SPMCR beside SPMCSR, the link picks any hardware USART through the instance-aware lookups (URSEL chips included), WDRF reads MCUSR-or-MCUCSR, and the >64 KiB shape lands — word-addressed wire flash (info flag bit 1, page byte 0 means 256, base as a word address), far reads through flash_load_far, a single 32-bit byte-cursor page walk (the 256-byte page wraps its low byte exactly), and slot arithmetic in words (the return address already is one). Host: addresses stay bytes internally and scale at the wire, the boot-fuse decode becomes a per-signature table (byte index + BOOTSZ ladder — the m168A's lives in EXTENDED), and the planner tests pin every chip's ladder plus the word-addressed info decode. Tests: the device runner serves every mega over the USART pty, pbapp banners over the right link, the update rehearsal synthesizes its assumed fuses from the tool's own table, and the PI lint tracks the renamed info symbol. All six classic-mega/168A targets pass the full suite (size, PI, planner, protocol, reloc, self-update) at 466–504 B; the 1284P builds await a libavr far-path slimming to make its 512. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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@@ -53,14 +53,35 @@ consteval avr::hertz_t clock()
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using dev = avr::device<{.clock = clock()}>;
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// The watchdog reset flag's home: MCUSR, or the classic megas' MCUCSR.
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consteval std::int16_t wdrf_field()
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{
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auto reg = std::string_view{avr::hw::db.regs[static_cast<std::size_t>(avr::power::detail::reset_reg())].name};
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return avr::hw::db.field_index(reg, "WDRF");
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}
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// Geometry: the resident loader owns the top 512 bytes of flash; the word
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// below it is the trampoline (the application's relocated reset vector) on
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// chips without a hardware boot section. The RWWSRE bit marks a separate
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// boot section — on classic AVR the two capabilities coincide.
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// boot section — on classic AVR the two capabilities coincide (the m8/m32
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// packs spell its register SPMCR).
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constexpr std::uint16_t boot_bytes = 512;
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constexpr std::uint16_t base = static_cast<std::uint16_t>(spm::flash_bytes - boot_bytes);
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constexpr std::uint32_t base = spm::flash_bytes - boot_bytes;
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constexpr std::uint16_t page = spm::page_bytes;
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constexpr bool boot_section = avr::hw::db.field_index("SPMCSR", "RWWSRE") >= 0;
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constexpr bool boot_section = [] {
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for (auto reg : {"SPMCSR", "SPMCR"})
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if (avr::hw::db.field_index(reg, "RWWSRE") >= 0)
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return true;
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return false;
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}();
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// Past 64 KiB a byte address no longer fits the wire's 16 bits, so on the
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// large chips every flash address on the wire — and all slot arithmetic —
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// is a word address instead ('J' always was one). Slots stay 512 bytes =
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// 256 words, so a slot is one high byte in either unit.
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constexpr bool word_flash = spm::flash_bytes > 65536;
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constexpr std::uint16_t wire_base = word_flash ? static_cast<std::uint16_t>(base / 2) : static_cast<std::uint16_t>(base);
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constexpr std::uint16_t wire_page_mask = word_flash ? (page / 2 - 1) : (page - 1);
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// The activation window, in seconds, is a compile-time constant (the build
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// may override it): the whole EEPROM belongs to the application, and
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@@ -71,8 +92,10 @@ constexpr bool boot_section = avr::hw::db.field_index("SPMCSR", "RWWSRE") >= 0;
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constexpr std::uint8_t timeout_seconds = PUREBOOT_TIMEOUT;
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// The 12-byte info block the host reads with the 'b' command; flash-resident
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// (there is no crt to copy a .data image).
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inline constexpr std::array<std::uint8_t, 12> info_data = {
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// (there is no crt to copy a .data image), word-aligned so its wire (word)
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// address is exact on the large chips. The page byte is the wire count
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// convention: 0 means 256.
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[[gnu::progmem]] alignas(2) inline constexpr std::array<std::uint8_t, 12> info_data = {
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'P',
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'B',
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1, // magic, protocol version
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@@ -80,13 +103,14 @@ inline constexpr std::array<std::uint8_t, 12> info_data = {
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avr::hw::db.signature[1],
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avr::hw::db.signature[2],
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static_cast<std::uint8_t>(page),
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base & 0xff,
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base >> 8, // app flash ends here; resident loader base
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wire_base & 0xff,
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wire_base >> 8, // app flash ends here; resident loader base (a word address on large chips)
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avr::hw::db.mem.eeprom_size & 0xff,
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avr::hw::db.mem.eeprom_size >> 8,
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boot_section ? 0 : 1, // bit 0: host must patch the reset vector (no hardware boot section)
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// bit 0: host must patch the reset vector (no hardware boot section);
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// bit 1: flash wire addresses are word addresses
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static_cast<std::uint8_t>((boot_section ? 0 : 1) | (word_flash ? 2 : 0)),
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};
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using info = avr::flash_table<info_data>;
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// The serial link: the hardware USART where the chip has one, the polled
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// software UART (no vector — the table belongs to the application) on PB0/PB1
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@@ -98,19 +122,19 @@ using info = avr::flash_table<info_data>;
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template <avr::hertz_t C>
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consteval std::int16_t rxc_field()
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{
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return avr::hw::db.field_index("UCSR0A", "RXC0");
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return avr::uart::detail::ufield<'0', "UCSR#A", "RXC#">();
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}
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template <avr::hertz_t C>
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consteval std::int16_t txc_field()
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{
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return avr::hw::db.field_index("UCSR0A", "TXC0");
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return avr::uart::detail::ufield<'0', "UCSR#A", "TXC#">();
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}
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template <avr::hertz_t C>
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consteval std::int16_t status_reg()
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{
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return avr::hw::db.reg_index("UCSR0A");
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return avr::uart::detail::ureg<'0', "UCSR#A">();
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}
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template <avr::hertz_t C>
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@@ -190,7 +214,8 @@ struct software_link {
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}
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};
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using link = std::conditional_t<avr::hw::db.has_reg("UDR0"), hardware_link<dev::clock>, software_link<dev::clock>>;
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using link = std::conditional_t<avr::hw::db.has_instance("USART0") || avr::hw::db.has_instance("USART"),
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hardware_link<dev::clock>, software_link<dev::clock>>;
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// The application's entry, an absolute address the linker pins (--defsym in
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// CMakeLists.txt): 0x0000 on the mega (word 0 stays the application's own
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@@ -245,19 +270,22 @@ std::uint16_t rx16()
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return static_cast<std::uint16_t>(low | (link::rx() << 8));
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}
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const std::uint8_t *flash_ptr(std::uint16_t address)
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{
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return reinterpret_cast<const std::uint8_t *>(address);
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}
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// The streamers take the count in the wire's 8-bit form: 0 means 256.
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// send_flash stays out of line: its two callers ('b' and 'R') otherwise each
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// inline a private copy of the loop.
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// inline a private copy of the loop. On the large chips the address is a
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// word address and the read goes through ELPM (flash_load_far).
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[[gnu::noinline]] void send_flash(std::uint16_t address, std::uint8_t count)
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{
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do
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link::tx(avr::flash_load(flash_ptr(address++)));
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while (--count);
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if constexpr (word_flash) {
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auto byte_address = static_cast<std::uint32_t>(address) << 1;
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do
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link::tx(avr::flash_load_far<std::uint8_t>(byte_address++));
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while (--count);
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} else {
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do
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link::tx(avr::flash_load(reinterpret_cast<const std::uint8_t *>(address++)));
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while (--count);
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}
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}
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void send_eeprom(std::uint16_t address, std::uint8_t count)
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@@ -287,7 +315,7 @@ void store_eeprom(std::uint16_t address, std::uint8_t count)
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// copy flashed one slot lower may rewrite the slot above it — how pureboot
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// updates itself. On the mega the RWW section is re-enabled so reads work
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// immediately.
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void program_flash(std::uint16_t address, std::uint8_t slot_high)
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void program_flash(std::uint16_t wire_address, std::uint8_t slot_high)
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{
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// A buffer word cannot be loaded twice without an erase (§26.2.1), so a
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// refused page's drained data must not linger for the next write:
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@@ -297,19 +325,40 @@ void program_flash(std::uint16_t address, std::uint8_t slot_high)
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spm::rww_enable<off>();
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else
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spm::clear_buffer<off>();
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// The address is the loop's only state: pages are aligned, so the walk
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// ends when the offset bits wrap back to zero.
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do {
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std::uint8_t low = link::rx();
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std::uint8_t high = link::rx();
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spm::fill<off>(address, static_cast<std::uint16_t>(low | (high << 8)));
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address += 2;
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} while (static_cast<std::uint8_t>(address) & (page - 1));
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address -= 2; // back inside the page — erase and write ignore the word bits
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const std::uint8_t page_high = static_cast<std::uint8_t>(address >> 8) & 0xfe;
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// One induction either way. On the byte-addressed chips the wire address
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// itself walks the page (aligned, so the offset bits wrap to zero); on
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// the word-addressed large chips the wire word address becomes a 32-bit
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// byte cursor once, and their 256-byte page makes its low byte the whole
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// in-page offset. The slot index is one high byte of the wire address —
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// two values on byte-addressed chips (the & ~1), bits 16:9 re-packed on
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// the large ones.
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spm::flash_address_t address;
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std::uint8_t page_high;
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if constexpr (word_flash) {
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address = static_cast<spm::flash_address_t>(static_cast<std::uint32_t>(wire_address) << 1);
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const auto start = address;
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do {
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std::uint8_t low = link::rx();
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std::uint8_t high = link::rx();
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spm::fill<off>(address, static_cast<std::uint16_t>(low | (high << 8)));
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address += 2;
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} while (static_cast<std::uint8_t>(address));
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address = start;
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page_high = static_cast<std::uint8_t>(static_cast<std::uint16_t>(address >> 8) >> 1);
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} else {
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address = static_cast<spm::flash_address_t>(wire_address);
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do {
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std::uint8_t low = link::rx();
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std::uint8_t high = link::rx();
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spm::fill<off>(address, static_cast<std::uint16_t>(low | (high << 8)));
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address += 2;
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} while (static_cast<std::uint8_t>(address) & (page - 1));
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address -= 2; // back inside the page — erase and write ignore the word bits
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page_high = static_cast<std::uint8_t>(address >> 8) & 0xfe;
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}
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if (page_high != slot_high) {
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// The tinies halt the CPU through the erase and the write, so only
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// the mega — running on while its RWW section programs — waits.
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// the megas — running on while their RWW section programs — wait.
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spm::erase_page<off>(address);
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if constexpr (boot_section)
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spm::wait();
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@@ -336,18 +385,20 @@ void send_fuses()
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{
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// A watchdog reset belongs to the application (whose watchdog stays
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// forced on until it clears WDRF) — no activation window in its way.
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if (avr::hw::mcusr::wdrf.test())
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// The flag register is MCUSR, or the classic megas' MCUCSR.
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if (avr::hw::field_impl<wdrf_field()>::test())
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run_app();
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link::init();
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// The high byte of the 512-byte-aligned base this copy runs at: the word
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// return address's high byte is the byte address >> 9 (the slot index),
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// doubled back into address terms. program_flash refuses this one slot
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// and the info block is addressed from it, so both follow wherever the
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// code was flashed.
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// The high byte of the 512-byte-aligned base this copy runs at: the
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// return address is a word address, whose high byte is the 256-word slot
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// index — on byte-addressed chips doubled back into byte terms.
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// program_flash refuses this one slot and the info block is addressed
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// from it, so both follow wherever the code was flashed.
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const std::uint16_t ra_words = reinterpret_cast<std::uint16_t>(__builtin_return_address(0));
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const std::uint8_t slot_high =
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static_cast<std::uint8_t>((reinterpret_cast<std::uint16_t>(__builtin_return_address(0)) >> 8) << 1);
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word_flash ? static_cast<std::uint8_t>(ra_words >> 8) : static_cast<std::uint8_t>((ra_words >> 8) << 1);
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// The knock: 'p' then 'b', each under a fresh window; any other byte is
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// line noise and waits again. Falling out of a window runs the app.
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@@ -364,11 +415,15 @@ void send_fuses()
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case 'b': { // info block, read relative to the running slot
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// The block sits in the image's first 256 bytes (the build lint
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// asserts it), and slots are 512-aligned — so the low byte of its
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// link address is its offset in any slot, and the high byte of
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// its runtime address is the running slot's. Built as a byte
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// pair so no absolute 16-bit address is ever materialized.
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const std::uint8_t low = static_cast<std::uint8_t>(reinterpret_cast<std::uint16_t>(info::storage.data()));
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send_flash(std::bit_cast<std::uint16_t>(std::array{low, slot_high}), info::size());
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// link address (in wire units: bytes, or words on the large
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// chips) is its offset in any slot, and the high byte of its
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// runtime address is the running slot's. Built as a byte pair so
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// no absolute address is ever materialized.
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const auto link_low = reinterpret_cast<std::uint16_t>(info_data.data());
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const std::uint8_t low =
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word_flash ? static_cast<std::uint8_t>(link_low >> 1) : static_cast<std::uint8_t>(link_low);
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send_flash(std::bit_cast<std::uint16_t>(std::array{low, slot_high}),
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static_cast<std::uint8_t>(info_data.size()));
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break;
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}
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case 'J': { // jump to a wire word address: hand-over and staging transfer
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