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Add git attribute to force LF line endings for assembly files

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BlackMark
2020-07-03 22:35:46 +02:00
parent 9a157f93ae
commit 9fbba7908e
2 changed files with 310 additions and 309 deletions
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1
.gitattributes vendored
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@@ -2,6 +2,7 @@
*.hpp eol=lf *.hpp eol=lf
*.c eol=lf *.c eol=lf
*.cpp eol=lf *.cpp eol=lf
*.s eol=lf
*.qrc eol=lf *.qrc eol=lf
*.ui eol=lf *.ui eol=lf
.git* eol=lf .git* eol=lf

618
AdaptiveBrightnessFirmware/startup_stm32f042x6.s
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@@ -1,309 +1,309 @@
/** /**
****************************************************************************** ******************************************************************************
* @file startup_stm32f042x6.s * @file startup_stm32f042x6.s
* @author MCD Application Team * @author MCD Application Team
* @brief STM32F042x4/STM32F042x6 devices vector table for GCC toolchain. * @brief STM32F042x4/STM32F042x6 devices vector table for GCC toolchain.
* This module performs: * This module performs:
* - Set the initial SP * - Set the initial SP
* - Set the initial PC == Reset_Handler, * - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address * - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually * - Branches to main in the C library (which eventually
* calls main()). * calls main()).
* After Reset the Cortex-M0 processor is in Thread mode, * After Reset the Cortex-M0 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main. * priority is Privileged, and the Stack is set to Main.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.</center></h2>
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at: * License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause * opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
.syntax unified .syntax unified
.cpu cortex-m0 .cpu cortex-m0
.fpu softvfp .fpu softvfp
.thumb .thumb
.global g_pfnVectors .global g_pfnVectors
.global Default_Handler .global Default_Handler
/* start address for the initialization values of the .data section. /* start address for the initialization values of the .data section.
defined in linker script */ defined in linker script */
.word _sidata .word _sidata
/* start address for the .data section. defined in linker script */ /* start address for the .data section. defined in linker script */
.word _sdata .word _sdata
/* end address for the .data section. defined in linker script */ /* end address for the .data section. defined in linker script */
.word _edata .word _edata
/* start address for the .bss section. defined in linker script */ /* start address for the .bss section. defined in linker script */
.word _sbss .word _sbss
/* end address for the .bss section. defined in linker script */ /* end address for the .bss section. defined in linker script */
.word _ebss .word _ebss
/** /**
* @brief This is the code that gets called when the processor first * @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely * starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application * necessary set is performed, after which the application
* supplied main() routine is called. * supplied main() routine is called.
* @param None * @param None
* @retval : None * @retval : None
*/ */
.section .text.Reset_Handler .section .text.Reset_Handler
.weak Reset_Handler .weak Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
ldr r0, =_estack ldr r0, =_estack
mov sp, r0 /* set stack pointer */ mov sp, r0 /* set stack pointer */
/*Check if boot space corresponds to test memory*/ /*Check if boot space corresponds to test memory*/
LDR R0,=0x00000004 LDR R0,=0x00000004
LDR R1, [R0] LDR R1, [R0]
LSRS R1, R1, #24 LSRS R1, R1, #24
LDR R2,=0x1F LDR R2,=0x1F
CMP R1, R2 CMP R1, R2
BNE ApplicationStart BNE ApplicationStart
/*SYSCFG clock enable*/ /*SYSCFG clock enable*/
LDR R0,=0x40021018 LDR R0,=0x40021018
LDR R1,=0x00000001 LDR R1,=0x00000001
STR R1, [R0] STR R1, [R0]
/*Set CFGR1 register with flash memory remap at address 0*/ /*Set CFGR1 register with flash memory remap at address 0*/
LDR R0,=0x40010000 LDR R0,=0x40010000
LDR R1,=0x00000000 LDR R1,=0x00000000
STR R1, [R0] STR R1, [R0]
ApplicationStart: ApplicationStart:
/* Copy the data segment initializers from flash to SRAM */ /* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata ldr r0, =_sdata
ldr r1, =_edata ldr r1, =_edata
ldr r2, =_sidata ldr r2, =_sidata
movs r3, #0 movs r3, #0
b LoopCopyDataInit b LoopCopyDataInit
CopyDataInit: CopyDataInit:
ldr r4, [r2, r3] ldr r4, [r2, r3]
str r4, [r0, r3] str r4, [r0, r3]
adds r3, r3, #4 adds r3, r3, #4
LoopCopyDataInit: LoopCopyDataInit:
adds r4, r0, r3 adds r4, r0, r3
cmp r4, r1 cmp r4, r1
bcc CopyDataInit bcc CopyDataInit
/* Zero fill the bss segment. */ /* Zero fill the bss segment. */
ldr r2, =_sbss ldr r2, =_sbss
ldr r4, =_ebss ldr r4, =_ebss
movs r3, #0 movs r3, #0
b LoopFillZerobss b LoopFillZerobss
FillZerobss: FillZerobss:
str r3, [r2] str r3, [r2]
adds r2, r2, #4 adds r2, r2, #4
LoopFillZerobss: LoopFillZerobss:
cmp r2, r4 cmp r2, r4
bcc FillZerobss bcc FillZerobss
/* Call the clock system intitialization function.*/ /* Call the clock system intitialization function.*/
bl SystemInit bl SystemInit
/* Call static constructors */ /* Call static constructors */
bl __libc_init_array bl __libc_init_array
/* Call the application's entry point.*/ /* Call the application's entry point.*/
bl main bl main
LoopForever: LoopForever:
b LoopForever b LoopForever
.size Reset_Handler, .-Reset_Handler .size Reset_Handler, .-Reset_Handler
/** /**
* @brief This is the code that gets called when the processor receives an * @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving * unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger. * the system state for examination by a debugger.
* *
* @param None * @param None
* @retval : None * @retval : None
*/ */
.section .text.Default_Handler,"ax",%progbits .section .text.Default_Handler,"ax",%progbits
Default_Handler: Default_Handler:
Infinite_Loop: Infinite_Loop:
b Infinite_Loop b Infinite_Loop
.size Default_Handler, .-Default_Handler .size Default_Handler, .-Default_Handler
/****************************************************************************** /******************************************************************************
* *
* The minimal vector table for a Cortex M0. Note that the proper constructs * The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address * must be placed on this to ensure that it ends up at physical address
* 0x0000.0000. * 0x0000.0000.
* *
******************************************************************************/ ******************************************************************************/
.section .isr_vector,"a",%progbits .section .isr_vector,"a",%progbits
.type g_pfnVectors, %object .type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors: g_pfnVectors:
.word _estack .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word HardFault_Handler .word HardFault_Handler
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word SVC_Handler .word SVC_Handler
.word 0 .word 0
.word 0 .word 0
.word PendSV_Handler .word PendSV_Handler
.word SysTick_Handler .word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */ .word WWDG_IRQHandler /* Window WatchDog */
.word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */
.word RTC_IRQHandler /* RTC through the EXTI line */ .word RTC_IRQHandler /* RTC through the EXTI line */
.word FLASH_IRQHandler /* FLASH */ .word FLASH_IRQHandler /* FLASH */
.word RCC_CRS_IRQHandler /* RCC and CRS */ .word RCC_CRS_IRQHandler /* RCC and CRS */
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
.word TSC_IRQHandler /* TSC */ .word TSC_IRQHandler /* TSC */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
.word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */ .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
.word ADC1_IRQHandler /* ADC1 */ .word ADC1_IRQHandler /* ADC1 */
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */ .word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */ .word TIM3_IRQHandler /* TIM3 */
.word 0 /* Reserved */ .word 0 /* Reserved */
.word 0 /* Reserved */ .word 0 /* Reserved */
.word TIM14_IRQHandler /* TIM14 */ .word TIM14_IRQHandler /* TIM14 */
.word 0 /* Reserved */ .word 0 /* Reserved */
.word TIM16_IRQHandler /* TIM16 */ .word TIM16_IRQHandler /* TIM16 */
.word TIM17_IRQHandler /* TIM17 */ .word TIM17_IRQHandler /* TIM17 */
.word I2C1_IRQHandler /* I2C1 */ .word I2C1_IRQHandler /* I2C1 */
.word 0 /* Reserved */ .word 0 /* Reserved */
.word SPI1_IRQHandler /* SPI1 */ .word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */ .word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */ .word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */ .word USART2_IRQHandler /* USART2 */
.word 0 /* Reserved */ .word 0 /* Reserved */
.word CEC_CAN_IRQHandler /* CEC and CAN */ .word CEC_CAN_IRQHandler /* CEC and CAN */
.word USB_IRQHandler /* USB */ .word USB_IRQHandler /* USB */
/******************************************************************************* /*******************************************************************************
* *
* Provide weak aliases for each Exception handler to the Default_Handler. * Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override * As they are weak aliases, any function with the same name will override
* this definition. * this definition.
* *
*******************************************************************************/ *******************************************************************************/
.weak NMI_Handler .weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler .thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler .weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler .thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler .weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler .thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler .weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler .thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler .weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler .thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler .weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler .thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_VDDIO2_IRQHandler .weak PVD_VDDIO2_IRQHandler
.thumb_set PVD_VDDIO2_IRQHandler,Default_Handler .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler
.weak RTC_IRQHandler .weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler .thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler .weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler .thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_CRS_IRQHandler .weak RCC_CRS_IRQHandler
.thumb_set RCC_CRS_IRQHandler,Default_Handler .thumb_set RCC_CRS_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler .weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler .thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler .weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler .thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler .weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler .thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak TSC_IRQHandler .weak TSC_IRQHandler
.thumb_set TSC_IRQHandler,Default_Handler .thumb_set TSC_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler .weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler .weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel4_5_IRQHandler .weak DMA1_Channel4_5_IRQHandler
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
.weak ADC1_IRQHandler .weak ADC1_IRQHandler
.thumb_set ADC1_IRQHandler,Default_Handler .thumb_set ADC1_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler .weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler .weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler .thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler .weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler .thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler .weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler .thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM14_IRQHandler .weak TIM14_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler .thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM16_IRQHandler .weak TIM16_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler .thumb_set TIM16_IRQHandler,Default_Handler
.weak TIM17_IRQHandler .weak TIM17_IRQHandler
.thumb_set TIM17_IRQHandler,Default_Handler .thumb_set TIM17_IRQHandler,Default_Handler
.weak I2C1_IRQHandler .weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler .thumb_set I2C1_IRQHandler,Default_Handler
.weak SPI1_IRQHandler .weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler .thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler .weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler .thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler .weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler .thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler .weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler .thumb_set USART2_IRQHandler,Default_Handler
.weak CEC_CAN_IRQHandler .weak CEC_CAN_IRQHandler
.thumb_set CEC_CAN_IRQHandler,Default_Handler .thumb_set CEC_CAN_IRQHandler,Default_Handler
.weak USB_IRQHandler .weak USB_IRQHandler
.thumb_set USB_IRQHandler,Default_Handler .thumb_set USB_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/